On 07/24/2016 07:27 PM, Joe Zeff wrote:
On 07/24/2016 02:14 PM, geo.inbox.ignored wrote:
> imbw, but, if battery is too weak to hold clock settings, reversion would
> be further than a few days. even if there is a cap holding cmos v.
Actually, the CMOS has always been designed to make the clock run slow
when the battery's weak to warn the user.
this is true, to a point.
it is not intended _by_design_, it is due to nature of the clock oscillator
i have never seen a cmos _lose_days_ during a power cycle. loss in days
during a power cycle would require a reset of the day count registers.
true that some tin foil beanie cap may have design a circuit to monitor
battery level and change counter direction, but i think that would be
pushing things. sure to be noticed, and not a lot of trouble to do.
then again... 8=)
i do recall a few years back that they was a lot of discussions going
as to how notification should be passed to user. what was ever decided
is something i am not aware of. checking with a few cmos designers would
be one way to find out. just read info on their cmos chips design would
be revealing if Stephan would drop to cmos boot to see who made chip.
CentOS GNU/Linux 6.8
Tired of having your microsoft os hacked?
Change to Linux os, used by microsoft hackers.
in a world with out fences, who needs gates.