From: Peter Jones <pjones(a)redhat.com>
It's really annoying that there's no way to turn off
unittest.assertEqual()'s stupid string truncation, and it makes it very
difficult to debug test failures that involve a fairly large amount of
data. So replace it with something that tells us the meaningful bits.
Signed-off-by: Peter Jones <pjones(a)redhat.com>
---
Makefile | 2 +-
tests/devicelibs_test/edd_test.py | 35 +++++++++++++++------------
tests/lib.py | 50 +++++++++++++++++++++++++++++++++++++++
3 files changed, 71 insertions(+), 16 deletions(-)
create mode 100644 tests/lib.py
diff --git a/Makefile b/Makefile
index 047a2dd..488ea8c 100644
--- a/Makefile
+++ b/Makefile
@@ -67,7 +67,7 @@ coverage: check-requires
$(COVERAGE) report --include="blivet/*" > coverage-report.log
check: check-requires
- PYTHONPATH=. tests/pylint/runpylint.py
+ PYTHONPATH=.:tests/ tests/pylint/runpylint.py
clean:
-rm *.tar.gz blivet/*.pyc blivet/*/*.pyc ChangeLog
diff --git a/tests/devicelibs_test/edd_test.py b/tests/devicelibs_test/edd_test.py
index 801ff71..cbcc483 100644
--- a/tests/devicelibs_test/edd_test.py
+++ b/tests/devicelibs_test/edd_test.py
@@ -6,6 +6,7 @@
import copy
from blivet.devicelibs import edd
+import lib
class FakeDevice(object):
@@ -39,8 +40,14 @@ def __eq__(self, other):
class EddTestCase(unittest.TestCase):
- _edd_logger = None
- max_diff = None
+
+ def __init__(self, *args, **kwds):
+ super(EddTestCase, self).__init__(*args, **kwds)
+ self._edd_logger = None
+
+ # these don't follow PEP8 because unittest.TestCase expects them this way
+ self.maxDiff = None
+ self.longMessage = True
def setUp(self):
super(EddTestCase, self).setUp()
@@ -86,15 +93,13 @@ def tearDown(self):
def check_logs(self, debugs=None, infos=None, warnings=None, errors=None):
def check(left, right_object):
- left = [mock.call(*x) for x in left or []]
- left.sort()
+ newleft = [mock.call(*x) for x in left or []]
right = copy.copy(right_object.call_args_list or [])
- right.sort()
- self.assertEqual(left, right)
- if len(left) == 0:
- self.assertEqual(right_object.called, False)
+ lib.assertVerboseListEqual(newleft, right)
+ if len(newleft) == 0:
+ lib.assertVerboseEqual(right_object.called, False)
else:
- self.assertEqual(right_object.called, True)
+ lib.assertVerboseEqual(right_object.called, True)
check(debugs, edd.log.debug)
check(infos, edd.log.info)
@@ -142,9 +147,9 @@ def test_collect_edd_data_sata_usb(self):
("edd: found device 0x%x at %s", 0x81,
'/sys/firmware/edd/int13_dev81'),
]
- self.assertEqual(len(edd_dict), 2)
- self.assertEqual(fakeedd[0x80], edd_dict[0x80])
- self.assertEqual(fakeedd[0x81], edd_dict[0x81])
+ lib.assertVerboseEqual(len(edd_dict), 2)
+ lib.assertVerboseEqual(fakeedd[0x80], edd_dict[0x80])
+ lib.assertVerboseEqual(fakeedd[0x81], edd_dict[0x81])
self.check_logs(debugs=debugs)
def test_get_edd_dict_sata_usb(self):
@@ -176,9 +181,9 @@ def test_get_edd_dict_sata_usb(self):
edd_dict = edd.get_edd_dict(devices)
self.debug('edd_dict: %s', edd_dict)
- self.assertEqual(len(edd_dict), 2)
- self.assertEqual(edd_dict["sda"], 0x80)
- self.assertEqual(edd_dict["sdb"], 0x81)
+ lib.assertVerboseEqual(len(edd_dict), 2)
+ lib.assertVerboseEqual(edd_dict["sda"], 0x80)
+ lib.assertVerboseEqual(edd_dict["sdb"], 0x81)
debugs = [
("edd: data extracted from 0x%x:\n%s", 0x80, fakeedd[0x80]),
("edd: data extracted from 0x%x:\n%s", 0x81, fakeedd[0x81]),
diff --git a/tests/lib.py b/tests/lib.py
new file mode 100644
index 0000000..10cb3ff
--- /dev/null
+++ b/tests/lib.py
@@ -0,0 +1,50 @@
+
+import pprint
+
+def assertVerboseListEqual(left, right, msg=None):
+ left.sort()
+ right.sort()
+
+ found = []
+ rightmissing = []
+ leftmissing = []
+ for x in left:
+ if x in right:
+ found.append(x)
+ else:
+ rightmissing.append(x)
+ for x in right:
+ if x not in found:
+ leftmissing.append(x)
+ if msg:
+ raise AssertionError(msg)
+
+ s = "\n"
+ if leftmissing:
+ s += "log has: \n"
+ for l in leftmissing:
+ s += " %s\n" % (pprint.pformat(l),)
+
+ if rightmissing:
+ s += "expected: \n"
+ for r in rightmissing:
+ s += " %s\n" % (pprint.pformat(r),)
+
+ if leftmissing or rightmissing:
+ raise AssertionError(s)
+
+def assertVerboseEqual(left, right, msg=None):
+ if left != right:
+ l = len(left)
+ r = len(right)
+ for x in range(0, max(l, r)):
+ if x > l-1:
+ assertVerboseEqual(None, right[x], msg)
+ if x > r-1:
+ assertVerboseEqual(left[x], None, msg)
+ if left[x] != right[x]:
+ if msg:
+ raise AssertionError(msg)
+ else:
+ raise AssertionError("%s != %s" % (
+ pprint.pformat(left), pprint.pformat(right)))
--
To view this commit on github, visit
https://github.com/rhinstaller/blivet/commit/a1308f05fc579445400cddd51fe8...