scm-commits August 2013

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[mimedefang/f18] (4 commits) ...Upgrade to 2.74 (#971523, thanks to Philip Prindeville)
by Robert Scheck 31 Aug '13

31 Aug '13

Summary of changes: 61c9857... - Rebuilt for https://fedoraproject.org/wiki/Fedora_19_Mass (*) dfc576d... Perl 5.18 rebuild (*) 0e9c50b... - Rebuilt for https://fedoraproject.org/wiki/Fedora_20_Mass (*) ad4805a... Upgrade to 2.74 (#971523, thanks to Philip Prindeville) (*) (*) This commit already existed in another branch; no separate mail sent

1 0

[gdb/f19] Remove --disablerepo='*' from BZ 554152 as it conflicts with BZ 981154.
by Jan Kratochvil 31 Aug '13

31 Aug '13

commit 841b118906367738304c76757481c766fb5351bf Author: Jan Kratochvil <jan.kratochvil(a)redhat.com> Date: Sat Aug 31 20:14:31 2013 +0200 Remove --disablerepo='*' from BZ 554152 as it conflicts with BZ 981154. - [ppc] Support Power8 CPU (IBM, BZ 731875). - [rhel5] tps-srpmtest does not set %{rhel} (BZ 1002198, Miroslav Franc). gdb-6.6-buildid-locate-rpm.patch | 80 ++--- gdb-power8-1of2.patch | 731 ++++++++++++++++++++++++++++++++++++++ gdb-power8-2of2.patch | 60 +++ gdb.spec | 17 +- 4 files changed, 845 insertions(+), 43 deletions(-) --- diff --git a/gdb-6.6-buildid-locate-rpm.patch b/gdb-6.6-buildid-locate-rpm.patch index 9917fdc..5d5e1be 100644 --- a/gdb-6.6-buildid-locate-rpm.patch +++ b/gdb-6.6-buildid-locate-rpm.patch @@ -1,7 +1,7 @@ -Index: gdb-7.5.91.20130407/gdb/event-top.c +Index: gdb-7.6/gdb/event-top.c =================================================================== ---- gdb-7.5.91.20130407.orig/gdb/event-top.c 2013-01-31 19:37:37.000000000 +0100 -+++ gdb-7.5.91.20130407/gdb/event-top.c 2013-04-11 16:53:03.230280376 +0200 +--- gdb-7.6.orig/gdb/event-top.c 2013-01-31 19:37:37.000000000 +0100 ++++ gdb-7.6/gdb/event-top.c 2013-07-17 19:51:02.679357656 +0200 @@ -36,6 +36,7 @@ #include "continuations.h" #include "gdbcmd.h" /* for dont_repeat() */ @@ -28,10 +28,10 @@ Index: gdb-7.5.91.20130407/gdb/event-top.c /* Each interpreter has its own rules on displaying the command prompt. */ if (!current_interp_display_prompt_p ()) -Index: gdb-7.5.91.20130407/gdb/elfread.c +Index: gdb-7.6/gdb/elfread.c =================================================================== ---- gdb-7.5.91.20130407.orig/gdb/elfread.c 2013-04-11 16:53:00.000000000 +0200 -+++ gdb-7.5.91.20130407/gdb/elfread.c 2013-04-11 16:53:03.231280376 +0200 +--- gdb-7.6.orig/gdb/elfread.c 2013-07-17 19:51:02.639357629 +0200 ++++ gdb-7.6/gdb/elfread.c 2013-07-17 19:51:50.738390068 +0200 @@ -49,6 +49,7 @@ #include "gdbcore.h" #include "gdbcmd.h" @@ -40,7 +40,7 @@ Index: gdb-7.5.91.20130407/gdb/elfread.c #include <sys/stat.h> extern void _initialize_elfread (void); -@@ -1629,8 +1630,361 @@ build_id_to_filename (const struct elf_b +@@ -1682,8 +1683,360 @@ build_id_to_filename (const struct elf_b return retval; } @@ -258,8 +258,7 @@ Index: gdb-7.5.91.20130407/gdb/elfread.c + + /* Base package name for `debuginfo-install'. We do not use the + `yum' command directly as the line -+ yum --disablerepo='*' --enablerepo='*debug*' \ -+ install NAME-debuginfo.ARCH ++ yum --enablerepo='*debug*' install NAME-debuginfo.ARCH + would be more complicated than just: + debuginfo-install NAME-VERSION-RELEASE.ARCH + Do not supply the rpm base name (derived from .src.rpm name) as @@ -399,11 +398,11 @@ Index: gdb-7.5.91.20130407/gdb/elfread.c + /* This MISSING_FILEPAIR_HASH tracker is used only for the duplicite messages - Try to install the hash file ... -+ yum --disablerepo='*' --enablerepo='*debug*' install ... ++ yum --enablerepo='*debug*' install ... avoidance. */ struct missing_filepair -@@ -1684,11 +2038,17 @@ missing_filepair_change (void) +@@ -1737,11 +2090,17 @@ missing_filepair_change (void) /* All their memory came just from missing_filepair_OBSTACK. */ missing_filepair_hash = NULL; } @@ -421,7 +420,7 @@ Index: gdb-7.5.91.20130407/gdb/elfread.c missing_filepair_change (); } -@@ -1755,14 +2115,35 @@ debug_print_missing (const char *binary, +@@ -1808,14 +2167,34 @@ debug_print_missing (const char *binary, *slot = missing_filepair; @@ -458,16 +457,15 @@ Index: gdb-7.5.91.20130407/gdb/elfread.c + _("Missing separate debuginfo for %s\n"), binary); + if (debug != NULL) + fprintf_unfiltered (gdb_stdlog, _("Try: %s %s\n"), -+ "yum --disablerepo='*' --enablerepo='*debug*'" -+ " install", debug); ++ "yum --enablerepo='*debug*' install", debug); + } } static char * -Index: gdb-7.5.91.20130407/gdb/symfile.h +Index: gdb-7.6/gdb/symfile.h =================================================================== ---- gdb-7.5.91.20130407.orig/gdb/symfile.h 2013-04-11 16:53:00.000000000 +0200 -+++ gdb-7.5.91.20130407/gdb/symfile.h 2013-04-11 16:53:03.231280376 +0200 +--- gdb-7.6.orig/gdb/symfile.h 2013-07-17 19:51:02.639357629 +0200 ++++ gdb-7.6/gdb/symfile.h 2013-07-17 19:51:02.687357661 +0200 @@ -598,6 +598,8 @@ extern struct elf_build_id *build_id_add extern char *build_id_to_filename (const struct elf_build_id *build_id, char **link_return, int add_debug_suffix); @@ -477,10 +475,10 @@ Index: gdb-7.5.91.20130407/gdb/symfile.h /* From dwarf2read.c */ -Index: gdb-7.5.91.20130407/gdb/testsuite/lib/gdb.exp +Index: gdb-7.6/gdb/testsuite/lib/gdb.exp =================================================================== ---- gdb-7.5.91.20130407.orig/gdb/testsuite/lib/gdb.exp 2013-04-11 16:53:00.000000000 +0200 -+++ gdb-7.5.91.20130407/gdb/testsuite/lib/gdb.exp 2013-04-11 16:53:03.232280376 +0200 +--- gdb-7.6.orig/gdb/testsuite/lib/gdb.exp 2013-07-17 19:51:02.640357629 +0200 ++++ gdb-7.6/gdb/testsuite/lib/gdb.exp 2013-07-17 19:51:02.688357662 +0200 @@ -1482,7 +1482,7 @@ proc default_gdb_start { } { warning "Couldn't set the width to 0." } @@ -490,10 +488,10 @@ Index: gdb-7.5.91.20130407/gdb/testsuite/lib/gdb.exp send_gdb "set build-id-verbose 0\n" gdb_expect 10 { -re "$gdb_prompt $" { -Index: gdb-7.5.91.20130407/gdb/testsuite/lib/mi-support.exp +Index: gdb-7.6/gdb/testsuite/lib/mi-support.exp =================================================================== ---- gdb-7.5.91.20130407.orig/gdb/testsuite/lib/mi-support.exp 2013-04-11 16:53:00.000000000 +0200 -+++ gdb-7.5.91.20130407/gdb/testsuite/lib/mi-support.exp 2013-04-11 16:53:03.233280376 +0200 +--- gdb-7.6.orig/gdb/testsuite/lib/mi-support.exp 2013-07-17 19:51:02.656357640 +0200 ++++ gdb-7.6/gdb/testsuite/lib/mi-support.exp 2013-07-17 19:51:02.689357663 +0200 @@ -212,7 +212,7 @@ proc default_mi_gdb_start { args } { warning "Couldn't set the width to 0." } @@ -503,10 +501,10 @@ Index: gdb-7.5.91.20130407/gdb/testsuite/lib/mi-support.exp send_gdb "190-gdb-set build-id-verbose 0\n" gdb_expect 10 { -re ".*190-gdb-set build-id-verbose 0\r\n190\\\^done\r\n$mi_gdb_prompt$" { -Index: gdb-7.5.91.20130407/gdb/tui/tui-interp.c +Index: gdb-7.6/gdb/tui/tui-interp.c =================================================================== ---- gdb-7.5.91.20130407.orig/gdb/tui/tui-interp.c 2013-01-01 07:41:30.000000000 +0100 -+++ gdb-7.5.91.20130407/gdb/tui/tui-interp.c 2013-04-11 16:53:03.233280376 +0200 +--- gdb-7.6.orig/gdb/tui/tui-interp.c 2013-01-01 07:41:30.000000000 +0100 ++++ gdb-7.6/gdb/tui/tui-interp.c 2013-07-17 19:51:02.689357663 +0200 @@ -30,6 +30,7 @@ #include "tui/tui.h" #include "tui/tui-io.h" @@ -515,10 +513,10 @@ Index: gdb-7.5.91.20130407/gdb/tui/tui-interp.c /* Set to 1 when the TUI mode must be activated when we first start gdb. */ -Index: gdb-7.5.91.20130407/gdb/aclocal.m4 +Index: gdb-7.6/gdb/aclocal.m4 =================================================================== ---- gdb-7.5.91.20130407.orig/gdb/aclocal.m4 2013-01-17 12:06:26.000000000 +0100 -+++ gdb-7.5.91.20130407/gdb/aclocal.m4 2013-04-11 16:53:03.234280376 +0200 +--- gdb-7.6.orig/gdb/aclocal.m4 2013-01-17 12:06:26.000000000 +0100 ++++ gdb-7.6/gdb/aclocal.m4 2013-07-17 19:51:02.689357663 +0200 @@ -11,6 +11,164 @@ # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @@ -684,10 +682,10 @@ Index: gdb-7.5.91.20130407/gdb/aclocal.m4 # AM_CONDITIONAL -*- Autoconf -*- # Copyright (C) 1997, 2000, 2001, 2003, 2004, 2005, 2006, 2008 -Index: gdb-7.5.91.20130407/gdb/config.in +Index: gdb-7.6/gdb/config.in =================================================================== ---- gdb-7.5.91.20130407.orig/gdb/config.in 2012-12-09 19:39:58.000000000 +0100 -+++ gdb-7.5.91.20130407/gdb/config.in 2013-04-11 16:53:03.234280376 +0200 +--- gdb-7.6.orig/gdb/config.in 2012-12-09 19:39:58.000000000 +0100 ++++ gdb-7.6/gdb/config.in 2013-07-17 19:51:02.689357663 +0200 @@ -33,6 +33,9 @@ /* Define to BFD's default target vector. */ #undef DEFAULT_BFD_VEC @@ -708,10 +706,10 @@ Index: gdb-7.5.91.20130407/gdb/config.in /* Define to 1 if you have the <libunwind-ia64.h> header file. */ #undef HAVE_LIBUNWIND_IA64_H -Index: gdb-7.5.91.20130407/gdb/configure +Index: gdb-7.6/gdb/configure =================================================================== ---- gdb-7.5.91.20130407.orig/gdb/configure 2013-04-11 16:50:50.000000000 +0200 -+++ gdb-7.5.91.20130407/gdb/configure 2013-04-11 16:53:13.077280119 +0200 +--- gdb-7.6.orig/gdb/configure 2013-07-17 19:51:01.665356963 +0200 ++++ gdb-7.6/gdb/configure 2013-07-17 19:51:02.691357664 +0200 @@ -686,6 +686,11 @@ PKGVERSION HAVE_NATIVE_GCORE_TARGET TARGET_OBS @@ -1259,10 +1257,10 @@ Index: gdb-7.5.91.20130407/gdb/configure subdirs="$subdirs testsuite" -Index: gdb-7.5.91.20130407/gdb/configure.ac +Index: gdb-7.6/gdb/configure.ac =================================================================== ---- gdb-7.5.91.20130407.orig/gdb/configure.ac 2013-04-11 16:50:33.000000000 +0200 -+++ gdb-7.5.91.20130407/gdb/configure.ac 2013-04-11 16:53:03.240280376 +0200 +--- gdb-7.6.orig/gdb/configure.ac 2013-07-17 19:51:01.666356964 +0200 ++++ gdb-7.6/gdb/configure.ac 2013-07-17 19:51:02.692357665 +0200 @@ -166,6 +166,199 @@ AC_DEFINE_DIR(AUTO_LOAD_SAFE_PATH, escap [Directories safe to hold auto-loaded files.]) AC_MSG_RESULT([$with_auto_load_safe_path]) @@ -1463,10 +1461,10 @@ Index: gdb-7.5.91.20130407/gdb/configure.ac AC_CONFIG_SUBDIRS(testsuite) # Check whether to support alternative target configurations -Index: gdb-7.5.91.20130407/gdb/corelow.c +Index: gdb-7.6/gdb/corelow.c =================================================================== ---- gdb-7.5.91.20130407.orig/gdb/corelow.c 2013-04-11 16:53:00.000000000 +0200 -+++ gdb-7.5.91.20130407/gdb/corelow.c 2013-04-11 16:53:03.240280376 +0200 +--- gdb-7.6.orig/gdb/corelow.c 2013-07-17 19:51:02.608357607 +0200 ++++ gdb-7.6/gdb/corelow.c 2013-07-17 19:51:02.692357665 +0200 @@ -314,7 +314,7 @@ build_id_locate_exec (int from_tty) symfile_objfile->flags |= OBJF_BUILD_ID_CORE_LOADED; } diff --git a/gdb-power8-1of2.patch b/gdb-power8-1of2.patch new file mode 100644 index 0000000..704d603 --- /dev/null +++ b/gdb-power8-1of2.patch @@ -0,0 +1,731 @@ +[PATCH] Full POWER8 binutils support +http://sourceware.org/ml/binutils/2013-05/msg00235.html +http://sourceware.org/ml/binutils-cvs/2013-05/msg00095.html + +### src/opcodes/ChangeLog 2013/05/17 12:57:15 1.1964 +### src/opcodes/ChangeLog 2013/05/21 01:36:46 1.1965 +## -1,3 +1,28 @@ ++2013-05-20 Peter Bergner <bergner(a)vnet.ibm.com> ++ ++ * ppc-dis.c (powerpc_init_dialect): Set default dialect to power8. ++ * ppc-opc.c (BHRBE, ST, SIX, PS, SXL, VXPS_MASK, XX1RB_MASK, ++ XLS_MASK, PPCVSX2): New defines. ++ (powerpc_opcodes) <bcdadd., bcdsub., bctar, bctar, bctarl, clrbhrb, ++ fmrgew, fmrgow, lqarx, lxsiwax, lxsiwzx, lxsspx, mfbhrbe, ++ mffprd, mffprwz, mfvrd, mfvrwz, mfvsrd, mfvsrwz, msgclrp, msgsndp, ++ mtfprd, mtfprwa, mtfprwz, mtsle, mtvrd, mtvrwa, mtvrwz, mtvsrd, ++ mtvsrwa, mtvsrwz, pbt., rfebb, stqcx., stxsiwx, stxsspx, ++ vaddcuq, vaddecuq, vaddeuqm, vaddudm, vadduqm, vbpermq, vcipher, ++ vcipherlast, vclzb, vclzd, vclzh, vclzw, vcmpequd, vcmpequd., ++ vcmpgtsd, vcmpgtsd., vcmpgtud, vcmpgtud., veqv, vgbbd, vmaxsd, ++ vmaxud, vminsd, vminud, vmrgew, vmrgow, vmulesw, vmuleuw, vmulosw, ++ vmulouw, vmuluwm, vnand, vncipher, vncipherlast, vorc, vpermxor, ++ vpksdss, vpksdus, vpkudum, vpkudus, vpmsumb, vpmsumd, vpmsumh, ++ vpmsumw, vpopcntb, vpopcntd, vpopcnth, vpopcntw, vrld, vsbox, ++ vshasigmad, vshasigmaw, vsld, vsrad, vsrd, vsubcuq, vsubecuq, ++ vsubeuqm, vsubudm, vsubuqm, vupkhsw, vupklsw, waitasec, xsaddsp, ++ xscvdpspn, xscvspdpn, xscvsxdsp, xscvuxdsp, xsdivsp, xsmaddasp, ++ xsmaddmsp, xsmsubasp, xsmsubmsp, xsmulsp, xsnmaddasp, xsnmaddmsp, ++ xsnmsubasp, xsnmsubmsp, xsresp, xsrsp, xsrsqrtesp, xssqrtsp, ++ xssubsp, xxleqv, xxlnand, xxlorc>: New instructions. ++ <lxvx, stxvx>: New extended mnemonics. ++ + 2013-05-17 Alan Modra <amodra(a)gmail.com> + + * ia64-raw.tbl: Replace non-ASCII char. +--- src/opcodes/ppc-dis.c 2013/01/11 02:25:36 1.62 ++++ src/opcodes/ppc-dis.c 2013/05/21 01:36:46 1.63 +@@ -315,10 +315,7 @@ + dialect = (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_VLE); + break; + default: +- dialect = (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64 +- | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 +- | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX +- | PPC_OPCODE_ANY); ++ dialect = ppc_parse_cpu (dialect, &sticky, "power8") | PPC_OPCODE_ANY; + } + + arg = info->disassembler_options; +--- src/opcodes/ppc-opc.c 2013/05/09 04:32:55 1.159 ++++ src/opcodes/ppc-opc.c 2013/05/21 01:36:46 1.160 +@@ -315,14 +315,18 @@ + { 0xfffc, 0, NULL, NULL, + PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED | PPC_OPERAND_DS }, + +- /* The DUIS field in a XFX form instruction, 10 bits unsigned imediate */ ++ /* The DUIS or BHRBE fields in a XFX form instruction, 10 bits ++ unsigned imediate */ + #define DUIS DS + 1 ++#define BHRBE DUIS + { 0x3ff, 11, NULL, NULL, 0 }, + + /* The E field in a wrteei instruction. */ + /* And the W bit in the pair singles instructions. */ ++ /* And the ST field in a VX form instruction. */ + #define E DUIS + 1 + #define PSW E ++#define ST E + { 0x1, 15, NULL, NULL, 0 }, + + /* The FL1 field in a POWER SC form instruction. */ +@@ -695,8 +699,16 @@ + #define UIMM3 UIMM + 1 + { 0x7, 16, NULL, NULL, 0 }, + ++ /* The SIX field in a VX form instruction. */ ++#define SIX UIMM3 + 1 ++ { 0xf, 11, NULL, NULL, 0 }, ++ ++ /* The PS field in a VX form instruction. */ ++#define PS SIX + 1 ++ { 0x1, 9, NULL, NULL, 0 }, ++ + /* The SHB field in a VA form instruction. */ +-#define SHB UIMM3 + 1 ++#define SHB PS + 1 + { 0xf, 6, NULL, NULL, 0 }, + + /* The other UIMM field in a half word EVX form instruction. */ +@@ -751,8 +763,12 @@ + #define S SP + 1 + { 0x1, 20, NULL, NULL, 0 }, + ++ /* The S field in a XL form instruction. */ ++#define SXL S + 1 ++ { 0x1, 11, NULL, NULL, PPC_OPERAND_OPTIONAL }, ++ + /* SH field starting at bit position 16. */ +-#define SH16 S + 1 ++#define SH16 SXL + 1 + /* The DCM and DGM fields in a Z form instruction. */ + #define DCM SH16 + #define DGM DCM +@@ -2325,6 +2341,9 @@ + /* A VX_MASK with a UIMM2 field. */ + #define VXUIMM2_MASK (VX_MASK | (0x7 << 18)) + ++/* A VX_MASK with a PS field. */ ++#define VXPS_MASK (VX_MASK & ~(0x1 << 9)) ++ + /* A VA form instruction. */ + #define VXA(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x03f)) + +@@ -2379,6 +2398,9 @@ + /* The mask for an XX1 form instruction. */ + #define XX1_MASK X (0x3f, 0x3ff) + ++/* An XX1_MASK with the RB field fixed. */ ++#define XX1RB_MASK (XX1_MASK | RB_MASK) ++ + /* The mask for an XX2 form instruction. */ + #define XX2_MASK (XX2 (0x3f, 0x1ff) | (0x1f << 16)) + +@@ -2516,6 +2538,9 @@ + /* The mask for an XL form instruction. */ + #define XL_MASK XLLK (0x3f, 0x3ff, 1) + ++/* An XL_MASK with the RT, RA and RB fields fixed, but S bit clear. */ ++#define XLS_MASK ((XL_MASK | RT_MASK | RA_MASK | RB_MASK) & ~(1 << 11)) ++ + /* An XL form instruction which explicitly sets the BO field. */ + #define XLO(op, bo, xop, lk) \ + (XLLK ((op), (xop), (lk)) | ((((unsigned long)(bo)) & 0x1f) << 21)) +@@ -2699,6 +2724,7 @@ + #define PPCVEC PPC_OPCODE_ALTIVEC + #define PPCVEC2 PPC_OPCODE_ALTIVEC2 + #define PPCVSX PPC_OPCODE_VSX ++#define PPCVSX2 PPC_OPCODE_VSX + #define POWER PPC_OPCODE_POWER + #define POWER2 PPC_OPCODE_POWER | PPC_OPCODE_POWER2 + #define PWR2COM PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_COMMON +@@ -2845,6 +2871,7 @@ + {"vperm", VXA(4, 43), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}}, + {"vsldoi", VXA(4, 44), VXASHB_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, SHB}}, + {"ps_sel", A (4, 23,0), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}}, ++{"vpermxor", VXA(4, 45), VXA_MASK, PPCVEC2, PPCNONE, {VD, VA, VB, VC}}, + {"vmaddfp", VXA(4, 46), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VC, VB}}, + {"ps_sel.", A (4, 23,1), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}}, + {"vnmsubfp", VXA(4, 47), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VC, VB}}, +@@ -2863,6 +2890,10 @@ + {"ps_nmadd", A (4, 31,0), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}}, + {"ps_nmadd.", A (4, 31,1), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}}, + {"ps_cmpo0", X (4, 32), X_MASK|(3<<21), PPCPS, PPCNONE, {BF, FRA, FRB}}, ++{"vaddeuqm", VXA(4, 60), VXA_MASK, PPCVEC2, PPCNONE, {VD, VA, VB, VC}}, ++{"vaddecuq", VXA(4, 61), VXA_MASK, PPCVEC2, PPCNONE, {VD, VA, VB, VC}}, ++{"vsubeuqm", VXA(4, 62), VXA_MASK, PPCVEC2, PPCNONE, {VD, VA, VB, VC}}, ++{"vsubecuq", VXA(4, 63), VXA_MASK, PPCVEC2, PPCNONE, {VD, VA, VB, VC}}, + {"vadduhm", VX (4, 64), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vmaxuh", VX (4, 66), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vrlh", VX (4, 68), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, +@@ -2886,6 +2917,8 @@ + {"vmaxuw", VX (4, 130), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vrlw", VX (4, 132), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vcmpequw", VXR(4, 134,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, ++{"vmulouw", VX (4, 136), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, ++{"vmuluwm", VX (4, 137), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"vmrghw", VX (4, 140), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vpkuhus", VX (4, 142), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"ps_mr", XRC(4, 72,0), XRA_MASK, PPCPS, PPCNONE, {FRT, FRB}}, +@@ -2893,12 +2926,17 @@ + {"machhwsu", XO (4, 76,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"machhwsu.", XO (4, 76,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"ps_cmpo1", X (4, 96), X_MASK|(3<<21), PPCPS, PPCNONE, {BF, FRA, FRB}}, ++{"vaddudm", VX (4, 192), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, ++{"vmaxud", VX (4, 194), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, ++{"vrld", VX (4, 196), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"vcmpeqfp", VXR(4, 198,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, ++{"vcmpequd", VXR(4, 199,0), VXR_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"vpkuwus", VX (4, 206), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"machhws", XO (4, 108,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"machhws.", XO (4, 108,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"nmachhws", XO (4, 110,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"nmachhws.", XO (4, 110,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, ++{"vadduqm", VX (4, 256), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"vmaxsb", VX (4, 258), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vslb", VX (4, 260), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vmulosb", VX (4, 264), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, +@@ -2911,6 +2949,7 @@ + {"mulchwu.", XRC(4, 136,1), X_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"macchwu", XO (4, 140,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"macchwu.", XO (4, 140,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, ++{"vaddcuq", VX (4, 320), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"vmaxsh", VX (4, 322), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vslh", VX (4, 324), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vmulosh", VX (4, 328), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, +@@ -2926,11 +2965,13 @@ + {"vaddcuw", VX (4, 384), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vmaxsw", VX (4, 386), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vslw", VX (4, 388), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, ++{"vmulosw", VX (4, 392), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"vexptefp", VX (4, 394), VXVA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}}, + {"vmrglw", VX (4, 396), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vpkshss", VX (4, 398), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"macchwsu", XO (4, 204,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"macchwsu.", XO (4, 204,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, ++{"vmaxsd", VX (4, 450), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"vsl", VX (4, 452), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vcmpgefp", VXR(4, 454,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vlogefp", VX (4, 458), VXVA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}}, +@@ -3014,6 +3055,7 @@ + {"evfsnabs", VX (4, 645), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}}, + {"evfsneg", VX (4, 646), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}}, + {"vcmpgtuw", VXR(4, 646,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, ++{"vmuleuw", VX (4, 648), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"evfsmul", VX (4, 648), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"evfsdiv", VX (4, 649), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"vrfip", VX (4, 650), VXVA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}}, +@@ -3039,11 +3081,13 @@ + {"cput", APU(4, 348,0), APU_RT_MASK, PPC405, PPCNONE, {RA, FSL}}, + {"efsadd", VX (4, 704), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"efssub", VX (4, 705), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA, RB}}, ++{"vminud", VX (4, 706), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"efsabs", VX (4, 708), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA}}, + {"vsr", VX (4, 708), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"efsnabs", VX (4, 709), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA}}, + {"efsneg", VX (4, 710), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA}}, + {"vcmpgtfp", VXR(4, 710,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, ++{"vcmpgtud", VXR(4, 711,0), VXR_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"efsmul", VX (4, 712), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"efsdiv", VX (4, 713), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"vrfim", VX (4, 714), VXVA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}}, +@@ -3163,12 +3207,16 @@ + {"vminsw", VX (4, 898), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vsraw", VX (4, 900), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vcmpgtsw", VXR(4, 902,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, ++{"vmulesw", VX (4, 904), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"vctuxs", VX (4, 906), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}}, + {"vcfpuxws", VX (4, 906), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}}, + {"vspltisw", VX (4, 908), VXVB_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, SIMM}}, + {"maclhwsu", XO (4, 460,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"maclhwsu.", XO (4, 460,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, ++{"vminsd", VX (4, 962), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, ++{"vsrad", VX (4, 964), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"vcmpbfp", VXR(4, 966,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, ++{"vcmpgtsd", VXR(4, 967,0), VXR_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"vctsxs", VX (4, 970), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}}, + {"vcfpsxws", VX (4, 970), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}}, + {"vupklpx", VX (4, 974), VXVA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}}, +@@ -3177,6 +3225,7 @@ + {"nmaclhws", XO (4, 494,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"nmaclhws.", XO (4, 494,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"vsububm", VX (4,1024), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, ++{"bcdadd.", VX (4,1025), VXPS_MASK, PPCVEC2, PPCNONE, {VD, VA, VB, PS}}, + {"vavgub", VX (4,1026), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vabsdub", VX (4,1027), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"evmhessf", VX (4,1027), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, +@@ -3185,6 +3234,7 @@ + {"udi0fcm.", APU(4, 515,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}}, + {"udi0fcm", APU(4, 515,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}}, + {"evmhossf", VX (4,1031), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, ++{"vpmsumb", VX (4,1032), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"evmheumi", VX (4,1032), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"evmhesmi", VX (4,1033), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"vmaxfp", VX (4,1034), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, +@@ -3206,6 +3256,7 @@ + {"evmhosmia", VX (4,1069), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"evmhosmfa", VX (4,1071), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"vsubuhm", VX (4,1088), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, ++{"bcdsub.", VX (4,1089), VXPS_MASK, PPCVEC2, PPCNONE, {VD, VA, VB, PS}}, + {"vavguh", VX (4,1090), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"vabsduh", VX (4,1091), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"vandc", VX (4,1092), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, +@@ -3213,11 +3264,13 @@ + {"udi1fcm.", APU(4, 547,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}}, + {"udi1fcm", APU(4, 547,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}}, + {"evmwhssf", VX (4,1095), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, ++{"vpmsumh", VX (4,1096), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"evmwlumi", VX (4,1096), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"vminfp", VX (4,1098), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"evmwhumi", VX (4,1100), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"vsro", VX (4,1100), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"evmwhsmi", VX (4,1101), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, ++{"vpkudum", VX (4,1102), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"evmwhsmf", VX (4,1103), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"evmwssf", VX (4,1107), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"machhwo", XO (4, 44,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, +@@ -3243,6 +3296,7 @@ + {"vabsduw", VX (4,1155), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"vmr", VX (4,1156), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VBA}}, + {"vor", VX (4,1156), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, ++{"vpmsumw", VX (4,1160), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"vcmpequw.", VXR(4, 134,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"udi2fcm.", APU(4, 579,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}}, + {"udi2fcm", APU(4, 579,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}}, +@@ -3250,6 +3304,7 @@ + {"machhwsuo.", XO (4, 76,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"ps_merge10", XOPS(4,592,0), XOPS_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}}, + {"ps_merge10.", XOPS(4,592,1), XOPS_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}}, ++{"vsubudm", VX (4,1216), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"evaddusiaaw", VX (4,1216), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}}, + {"evaddssiaaw", VX (4,1217), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}}, + {"evsubfusiaaw",VX (4,1218), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}}, +@@ -3259,18 +3314,22 @@ + {"evdivws", VX (4,1222), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"vcmpeqfp.", VXR(4, 198,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"udi3fcm.", APU(4, 611,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}}, ++{"vcmpequd.", VXR(4, 199,1), VXR_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"udi3fcm", APU(4, 611,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}}, + {"evdivwu", VX (4,1223), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, ++{"vpmsumd", VX (4,1224), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"evaddumiaaw", VX (4,1224), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}}, + {"evaddsmiaaw", VX (4,1225), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}}, + {"evsubfumiaaw",VX (4,1226), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}}, + {"evsubfsmiaaw",VX (4,1227), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}}, ++{"vpkudus", VX (4,1230), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"machhwso", XO (4, 108,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"machhwso.", XO (4, 108,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"nmachhwso", XO (4, 110,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"nmachhwso.", XO (4, 110,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"ps_merge11", XOPS(4,624,0), XOPS_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}}, + {"ps_merge11.", XOPS(4,624,1), XOPS_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}}, ++{"vsubuqm", VX (4,1280), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"evmheusiaaw", VX (4,1280), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"evmhessiaaw", VX (4,1281), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"vavgsb", VX (4,1282), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, +@@ -3283,8 +3342,11 @@ + {"udi4fcm", APU(4, 643,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}}, + {"evmhossfaaw", VX (4,1287), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"evmheumiaaw", VX (4,1288), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, ++{"vcipher", VX (4,1288), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, ++{"vcipherlast", VX (4,1289), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"evmhesmiaaw", VX (4,1289), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"evmhesmfaaw", VX (4,1291), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, ++{"vgbbd", VX (4,1292), VXVA_MASK, PPCVEC2, PPCNONE, {VD, VB}}, + {"evmhoumiaaw", VX (4,1292), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"evmhosmiaaw", VX (4,1293), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"evmhosmfaaw", VX (4,1295), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, +@@ -3296,13 +3358,19 @@ + {"evmhogumiaa", VX (4,1324), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"evmhogsmiaa", VX (4,1325), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"evmhogsmfaa", VX (4,1327), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, ++{"vsubcuq", VX (4,1344), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"evmwlusiaaw", VX (4,1344), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"evmwlssiaaw", VX (4,1345), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"vavgsh", VX (4,1346), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, ++{"vorc", VX (4,1348), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"udi5fcm.", APU(4, 675,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}}, + {"udi5fcm", APU(4, 675,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}}, ++{"vncipher", VX (4,1352), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"evmwlumiaaw", VX (4,1352), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, ++{"vncipherlast",VX (4,1353), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"evmwlsmiaaw", VX (4,1353), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, ++{"vbpermq", VX (4,1356), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, ++{"vpksdus", VX (4,1358), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"evmwssfaa", VX (4,1363), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"macchwo", XO (4, 172,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"evmwumiaa", VX (4,1368), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, +@@ -3316,6 +3384,7 @@ + {"evmhessianw", VX (4,1409), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"vavgsw", VX (4,1410), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"evmhessfanw", VX (4,1411), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, ++{"vnand", VX (4,1412), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"evmhousianw", VX (4,1412), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"evmhossianw", VX (4,1413), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"udi6fcm.", APU(4, 707,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}}, +@@ -3337,11 +3406,14 @@ + {"evmhogsmfan", VX (4,1455), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"evmwlusianw", VX (4,1472), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"evmwlssianw", VX (4,1473), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, ++{"vsld", VX (4,1476), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"vcmpgefp.", VXR(4, 454,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"udi7fcm.", APU(4, 739,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}}, + {"udi7fcm", APU(4, 739,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}}, ++{"vsbox", VX (4,1480), VXVB_MASK, PPCVEC2, PPCNONE, {VD, VA}}, + {"evmwlumianw", VX (4,1480), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"evmwlsmianw", VX (4,1481), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, ++{"vpksdss", VX (4,1486), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"evmwssfan", VX (4,1491), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, + {"macchwso", XO (4, 236,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"evmwumian", VX (4,1496), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, +@@ -3362,15 +3434,25 @@ + {"vsum4shs", VX (4,1608), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"udi9fcm.", APU(4, 804,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}}, + {"udi9fcm", APU(4, 804,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}}, ++{"vupkhsw", VX (4,1614), VXVA_MASK, PPCVEC2, PPCNONE, {VD, VB}}, + {"vsubuws", VX (4,1664), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, ++{"vshasigmaw", VX (4,1666), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, ST, SIX}}, ++{"veqv", VX (4,1668), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"vcmpgtuw.", VXR(4, 646,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"udi10fcm.", APU(4, 835,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}}, + {"udi10fcm", APU(4, 835,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}}, + {"vsum2sws", VX (4,1672), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, ++{"vmrgow", VX (4,1676), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, ++{"vshasigmad", VX (4,1730), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, ST, SIX}}, ++{"vsrd", VX (4,1732), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"vcmpgtfp.", VXR(4, 710,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"udi11fcm.", APU(4, 867,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}}, ++{"vcmpgtud.", VXR(4, 711,1), VXR_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"udi11fcm", APU(4, 867,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}}, ++{"vupklsw", VX (4,1742), VXVA_MASK, PPCVEC2, PPCNONE, {VD, VB}}, + {"vsubsbs", VX (4,1792), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, ++{"vclzb", VX (4,1794), VXVA_MASK, PPCVEC2, PPCNONE, {VD, VB}}, ++{"vpopcntb", VX (4,1795), VXVA_MASK, PPCVEC2, PPCNONE, {VD, VB}}, + {"vcmpgtsb.", VXR(4, 774,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"udi12fcm.", APU(4, 899,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}}, + {"udi12fcm", APU(4, 899,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}}, +@@ -3378,6 +3460,8 @@ + {"maclhwuo", XO (4, 396,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"maclhwuo.", XO (4, 396,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"vsubshs", VX (4,1856), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, ++{"vclzh", VX (4,1858), VXVA_MASK, PPCVEC2, PPCNONE, {VD, VB}}, ++{"vpopcnth", VX (4,1859), VXVA_MASK, PPCVEC2, PPCNONE, {VD, VB}}, + {"vcmpgtsh.", VXR(4, 838,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"udi13fcm.", APU(4, 931,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}}, + {"udi13fcm", APU(4, 931,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}}, +@@ -3386,14 +3470,20 @@ + {"nmaclhwo", XO (4, 430,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"nmaclhwo.", XO (4, 430,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"vsubsws", VX (4,1920), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, ++{"vclzw", VX (4,1922), VXVA_MASK, PPCVEC2, PPCNONE, {VD, VB}}, ++{"vpopcntw", VX (4,1923), VXVA_MASK, PPCVEC2, PPCNONE, {VD, VB}}, + {"vcmpgtsw.", VXR(4, 902,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, + {"udi14fcm.", APU(4, 963,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}}, + {"udi14fcm", APU(4, 963,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}}, + {"vsumsws", VX (4,1928), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, ++{"vmrgew", VX (4,1932), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"maclhwsuo", XO (4, 460,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"maclhwsuo.", XO (4, 460,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, ++{"vclzd", VX (4,1986), VXVA_MASK, PPCVEC2, PPCNONE, {VD, VB}}, ++{"vpopcntd", VX (4,1987), VXVA_MASK, PPCVEC2, PPCNONE, {VD, VB}}, + {"vcmpbfp.", VXR(4, 966,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}}, + {"udi15fcm.", APU(4, 995,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}}, ++{"vcmpgtsd.", VXR(4, 967,1), VXR_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}}, + {"udi15fcm", APU(4, 995,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}}, + {"maclhwso", XO (4, 492,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"maclhwso.", XO (4, 492,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, +@@ -3965,6 +4055,8 @@ + + {"crandc", XL(19,129), XL_MASK, COM, PPCNONE, {BT, BA, BB}}, + ++{"rfebb", XL(19,146), XLS_MASK, POWER8, PPCNONE, {SXL}}, ++ + {"isync", XL(19,150), 0xffffffff, PPCCOM, PPCNONE, {0}}, + {"ics", XL(19,150), 0xffffffff, PWRCOM, PPCNONE, {0}}, + +@@ -4148,6 +4240,13 @@ + {"bcctrl", XLLK(19,528,1), XLBH_MASK, PPCCOM, PPCNONE, {BO, BI, BH}}, + {"bccl", XLLK(19,528,1), XLBB_MASK, PWRCOM, PPCNONE, {BO, BI}}, + ++{"bctar-", XLYLK(19,560,0,0), XLYBB_MASK, POWER8, PPCNONE, {BOE, BI}}, ++{"bctarl-", XLYLK(19,560,0,1), XLYBB_MASK, POWER8, PPCNONE, {BOE, BI}}, ++{"bctar+", XLYLK(19,560,1,0), XLYBB_MASK, POWER8, PPCNONE, {BOE, BI}}, ++{"bctarl+", XLYLK(19,560,1,1), XLYBB_MASK, POWER8, PPCNONE, {BOE, BI}}, ++{"bctar", XLLK(19,560,0), XLBH_MASK, POWER8, PPCNONE, {BO, BI, BH}}, ++{"bctarl", XLLK(19,560,1), XLBH_MASK, POWER8, PPCNONE, {BO, BI, BH}}, ++ + {"rlwimi", M(20,0), M_MASK, PPCCOM, PPCNONE, {RA, RS, SH, MBE, ME}}, + {"rlimi", M(20,0), M_MASK, PWRCOM, PPCNONE, {RA, RS, SH, MBE, ME}}, + +@@ -4276,6 +4375,8 @@ + {"mulhwu", XO(31,11,0,0), XO_MASK, PPC|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"mulhwu.", XO(31,11,0,1), XO_MASK, PPC|PPCVLE, PPCNONE, {RT, RA, RB}}, + ++{"lxsiwzx", X(31,12), XX1_MASK, PPCVSX2, PPCNONE, {XT6, RA0, RB}}, ++ + {"isellt", X(31,15), X_MASK, PPCISEL, PPCNONE, {RT, RA0, RB}}, + + {"tlbilxlpid", XTO(31,18,0), XTO_MASK, E500MC|PPCA2, PPCNONE, {0}}, +@@ -4316,6 +4417,9 @@ + {"maskg.", XRC(31,29,1), X_MASK, M601, PPCA2, {RA, RS, RB}}, + + {"ldepx", X(31,29), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RT, RA0, RB}}, ++ ++{"waitasec", X(31,30), XRTRARB_MASK,POWER8, PPCNONE, {0}}, ++ + {"lwepx", X(31,31), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RT, RA0, RB}}, + + {"cmplw", XOPL(31,32,0), XCMPL_MASK, PPCCOM|PPCVLE, PPCNONE, {OBF, RA, RB}}, +@@ -4335,6 +4439,8 @@ + + {"addg6s", XO(31,74,0,0), XO_MASK, POWER6, PPCNONE, {RT, RA, RB}}, + ++{"lxsiwax", X(31,76), XX1_MASK, PPCVSX2, PPCNONE, {XT6, RA0, RB}}, ++ + {"iseleq", X(31,79), X_MASK, PPCISEL, PPCNONE, {RT, RA0, RB}}, + + {"isel", XISEL(31,15), XISEL_MASK, PPCISEL|TITAN|PPCVLE, PPCNONE, {RT, RA0, RB, CRB}}, +@@ -4344,6 +4450,9 @@ + {"subf.", XO(31,40,0,1), XO_MASK, PPC|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"sub.", XO(31,40,0,1), XO_MASK, PPC|PPCVLE, PPCNONE, {RT, RB, RA}}, + ++{"mfvsrd", X(31,51), XX1RB_MASK, PPCVSX2, PPCNONE, {RA, XS6}}, ++{"mffprd", X(31,51), XX1RB_MASK|1, PPCVSX2, PPCNONE, {RA, FRS}}, ++{"mfvrd", X(31,51)|1, XX1RB_MASK|1, PPCVSX2, PPCNONE, {RA, VS}}, + {"eratilx", X(31,51), X_MASK, PPCA2, PPCNONE, {ERAT_T, RA, RB}}, + + {"lbarx", X(31,52), XEH_MASK, POWER7|PPCVLE, PPCNONE, {RT, RA0, RB, EH}}, +@@ -4421,6 +4530,10 @@ + + {"mtsrdin", X(31,114), XRA_MASK, PPC64, PPCNONE, {RS, RB}}, + ++{"mffprwz", X(31,115), XX1RB_MASK|1, PPCVSX2, PPCNONE, {RA, FRS}}, ++{"mfvrwz", X(31,115)|1, XX1RB_MASK|1, PPCVSX2, PPCNONE, {RA, VS}}, ++{"mfvsrwz", X(31,115), XX1RB_MASK, PPCVSX2, PPCNONE, {RA, XS6}}, ++ + {"lharx", X(31,116), XEH_MASK, POWER7|PPCVLE, PPCNONE, {RT, RA0, RB, EH}}, + + {"clf", X(31,118), XTO_MASK, POWER, PPCNONE, {RA, RB}}, +@@ -4453,6 +4566,9 @@ + {"adde.", XO(31,138,0,1), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"ae.", XO(31,138,0,1), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}}, + ++{"stxsiwx", X(31,140), XX1_MASK, PPCVSX2, PPCNONE, {XS6, RA0, RB}}, ++ ++{"msgsndp", XRTRA(31,142,0,0), XRTRA_MASK, POWER8, PPCNONE, {RB}}, + {"dcbtstlse", X(31,142), X_MASK, PPCCHLK, E500MC, {CT, RA0, RB}}, + + {"mtcr", XFXM(31,144,0xff,0), XRARB_MASK, COM, PPCNONE, {RS}}, +@@ -4461,6 +4577,8 @@ + + {"mtmsr", X(31,146), XRLARB_MASK, COM|PPCVLE, PPCNONE, {RS, A_L}}, + ++{"mtsle", X(31,147), XRTLRARB_MASK, POWER8, PPCNONE, {L}}, ++ + {"eratsx", XRC(31,147,0), X_MASK, PPCA2, PPCNONE, {RT, RA0, RB}}, + {"eratsx.", XRC(31,147,1), X_MASK, PPCA2, PPCNONE, {RT, RA0, RB}}, + +@@ -4490,14 +4608,19 @@ + {"stvehx", X(31,167), X_MASK, PPCVEC, PPCNONE, {VS, RA0, RB}}, + {"sthfcmx", APU(31,167,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}}, + ++{"msgclrp", XRTRA(31,174,0,0), XRTRA_MASK, POWER8, PPCNONE, {RB}}, + {"dcbtlse", X(31,174), X_MASK, PPCCHLK, E500MC, {CT, RA0, RB}}, + + {"mtmsrd", X(31,178), XRLARB_MASK, PPC64, PPCNONE, {RS, A_L}}, + ++{"mtvsrd", X(31,179), XX1RB_MASK, PPCVSX2, PPCNONE, {XT6, RA}}, ++{"mtfprd", X(31,179), XX1RB_MASK|1, PPCVSX2, PPCNONE, {FRT, RA}}, ++{"mtvrd", X(31,179)|1, XX1RB_MASK|1, PPCVSX2, PPCNONE, {VD, RA}}, + {"eratre", X(31,179), X_MASK, PPCA2, PPCNONE, {RT, RA, WS}}, + + {"stdux", X(31,181), X_MASK, PPC64|PPCVLE, PPCNONE, {RS, RAS, RB}}, + ++{"stqcx.", XRC(31,182,1), X_MASK, POWER8, PPCNONE, {RSQ, RA0, RB}}, + {"wchkall", X(31,182), X_MASK, PPCA2, PPCNONE, {OBF}}, + + {"stwux", X(31,183), X_MASK, PPCCOM|PPCVLE, PPCNONE, {RS, RAS, RB}}, +@@ -4527,6 +4650,9 @@ + + {"mtsr", X(31,210), XRB_MASK|(1<<20), COM, NON32, {SR, RS}}, + ++{"mtfprwa", X(31,211), XX1RB_MASK|1, PPCVSX2, PPCNONE, {FRT, RA}}, ++{"mtvrwa", X(31,211)|1, XX1RB_MASK|1, PPCVSX2, PPCNONE, {VD, RA}}, ++{"mtvsrwa", X(31,211), XX1RB_MASK, PPCVSX2, PPCNONE, {XT6, RA}}, + {"eratwe", X(31,211), X_MASK, PPCA2, PPCNONE, {RS, RA, WS}}, + + {"ldawx.", XRC(31,212,1), X_MASK, PPCA2, PPCNONE, {RT, RA0, RB}}, +@@ -4571,6 +4697,10 @@ + {"mtsrin", X(31,242), XRA_MASK, PPC, NON32, {RS, RB}}, + {"mtsri", X(31,242), XRA_MASK, POWER, NON32, {RS, RB}}, + ++{"mtfprwz", X(31,243), XX1RB_MASK|1, PPCVSX2, PPCNONE, {FRT, RA}}, ++{"mtvrwz", X(31,243)|1, XX1RB_MASK|1, PPCVSX2, PPCNONE, {VD, RA}}, ++{"mtvsrwz", X(31,243), XX1RB_MASK, PPCVSX2, PPCNONE, {XT6, RA}}, ++ + {"dcbtstt", XRT(31,246,0x10), XRT_MASK, POWER7, PPCNONE, {RA0, RB}}, + {"dcbtst", X(31,246), X_MASK, POWER4, PPCNONE, {RA0, RB, CT}}, + {"dcbtst", X(31,246), X_MASK, PPC|PPCVLE, POWER4, {CT, RA0, RB}}, +@@ -4608,6 +4738,8 @@ + + {"mfapidi", X(31,275), X_MASK, BOOKE, TITAN, {RT, RA}}, + ++{"lqarx", X(31,276), XEH_MASK, POWER8, PPCNONE, {RTQ, RAX, RBX, EH}}, ++ + {"lscbx", XRC(31,277,0), X_MASK, M601, PPCNONE, {RT, RA, RB}}, + {"lscbx.", XRC(31,277,1), X_MASK, M601, PPCNONE, {RT, RA, RB}}, + +@@ -4629,6 +4761,8 @@ + {"lvexhx", X(31,293), X_MASK, PPCVEC2, PPCNONE, {VD, RA0, RB}}, + {"lvepx", X(31,295), X_MASK, PPCVEC2|PPCVLE, PPCNONE, {VD, RA0, RB}}, + ++{"mfbhrbe", X(31,302), X_MASK, POWER8, PPCNONE, {RT, BHRBE}}, ++ + {"tlbie", X(31,306), XRTLRA_MASK, PPC, TITAN, {RB, L}}, + {"tlbi", X(31,306), XRT_MASK, POWER, PPCNONE, {RA0, RB}}, + +@@ -4937,6 +5071,8 @@ + + {"slbmte", X(31,402), XRA_MASK, PPC64, PPCNONE, {RS, RB}}, + ++{"pbt.", XRC(31,404,1), X_MASK, POWER8, PPCNONE, {RS, RA0, RB}}, ++ + {"icswx", XRC(31,406,0), X_MASK, POWER7|PPCA2, PPCNONE, {RS, RA, RB}}, + {"icswx.", XRC(31,406,1), X_MASK, POWER7|PPCA2, PPCNONE, {RS, RA, RB}}, + +@@ -4958,6 +5094,8 @@ + {"divwe", XO(31,427,0,0), XO_MASK, POWER7|PPCA2, PPCNONE, {RT, RA, RB}}, + {"divwe.", XO(31,427,0,1), XO_MASK, POWER7|PPCA2, PPCNONE, {RT, RA, RB}}, + ++{"clrbhrb", X(31,430), 0xffffffff, POWER8, PPCNONE, {0}}, ++ + {"slbie", X(31,434), XRTRA_MASK, PPC64, PPCNONE, {RB}}, + + {"ecowx", X(31,438), X_MASK, PPC, TITAN, {RT, RA0, RB}}, +@@ -5246,6 +5384,8 @@ + {"addco.", XO(31,10,1,1), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}}, + {"ao.", XO(31,10,1,1), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}}, + ++{"lxsspx", X(31,524), XX1_MASK, PPCVSX2, PPCNONE, {XT6, RA0, RB}}, ++ + {"clcs", X(31,531), XRB_MASK, M601, PPCNONE, {RT, RA}}, + + {"ldbrx", X(31,532), X_MASK, CELL|POWER7|PPCA2, PPCNONE, {RT, RA0, RB}}, +@@ -5340,6 +5480,8 @@ + {"stvlx", X(31,647), X_MASK, CELL, PPCNONE, {VS, RA0, RB}}, + {"stbfcmux", APU(31,647,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}}, + ++{"stxsspx", X(31,652), XX1_MASK, PPCVSX2, PPCNONE, {XS6, RA0, RB}}, ++ + {"tbegin.", XRC(31,654,1), XRTLRARB_MASK,PPCHTM, PPCNONE, {HTM_R}}, + + {"subfeo", XO(31,136,1,0), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}}, +@@ -5525,6 +5667,7 @@ + {"divo.", XO(31,331,1,1), XO_MASK, M601, PPCNONE, {RT, RA, RB}}, + + {"lxvd2x", X(31,844), XX1_MASK, PPCVSX, PPCNONE, {XT6, RA0, RB}}, ++{"lxvx", X(31,844), XX1_MASK, PPCVSX, PPCNONE, {XT6, RA0, RB}}, + + {"tabortwci.", XRC(31,846,1), X_MASK, PPCHTM, PPCNONE, {TO, RA, HTM_SI}}, + +@@ -5636,6 +5779,7 @@ + {"divwuo.", XO(31,459,1,1), XO_MASK, PPC|PPCVLE, PPCNONE, {RT, RA, RB}}, + + {"stxvd2x", X(31,972), XX1_MASK, PPCVSX, PPCNONE, {XS6, RA0, RB}}, ++{"stxvx", X(31,972), XX1_MASK, PPCVSX, PPCNONE, {XS6, RA0, RB}}, + + {"tlbld", X(31,978), XRTRA_MASK, PPC, PPC403|BOOKE|PPCA2|PPC476, {RB}}, + {"tlbwehi", XTLB(31,978,0), XTLB_MASK, PPC403, PPCNONE, {RT, RA}}, +@@ -5868,14 +6012,25 @@ + {"fcfidus", XRC(59,974,0), XRA_MASK, POWER7|PPCA2, PPCNONE, {FRT, FRB}}, + {"fcfidus.", XRC(59,974,1), XRA_MASK, POWER7|PPCA2, PPCNONE, {FRT, FRB}}, + ++{"xsaddsp", XX3(60,0), XX3_MASK, PPCVSX2, PPCNONE, {XT6, XA6, XB6}}, ++{"xsmaddasp", XX3(60,1), XX3_MASK, PPCVSX2, PPCNONE, {XT6, XA6, XB6}}, + {"xxsldwi", XX3(60,2), XX3SHW_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6, SHW}}, + {"xxsel", XX4(60,3), XX4_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6, XC6}}, ++{"xssubsp", XX3(60,8), XX3_MASK, PPCVSX2, PPCNONE, {XT6, XA6, XB6}}, ++{"xsmaddmsp", XX3(60,9), XX3_MASK, PPCVSX2, PPCNONE, {XT6, XA6, XB6}}, + {"xxspltd", XX3(60,10), XX3DM_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6S, DMEX}}, + {"xxmrghd", XX3(60,10), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, + {"xxswapd", XX3(60,10)|(2<<8), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6S}}, + {"xxmrgld", XX3(60,10)|(3<<8), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, + {"xxpermdi", XX3(60,10), XX3DM_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6, DM}}, ++{"xsrsqrtesp", XX2(60,10), XX2_MASK, PPCVSX2, PPCNONE, {XT6, XB6}}, ++{"xssqrtsp", XX2(60,11), XX2_MASK, PPCVSX2, PPCNONE, {XT6, XB6}}, ++{"xsmulsp", XX3(60,16), XX3_MASK, PPCVSX2, PPCNONE, {XT6, XA6, XB6}}, ++{"xsmsubasp", XX3(60,17), XX3_MASK, PPCVSX2, PPCNONE, {XT6, XA6, XB6}}, + {"xxmrghw", XX3(60,18), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, ++{"xsdivsp", XX3(60,24), XX3_MASK, PPCVSX2, PPCNONE, {XT6, XA6, XB6}}, ++{"xsmsubmsp", XX3(60,25), XX3_MASK, PPCVSX2, PPCNONE, {XT6, XA6, XB6}}, ++{"xsresp", XX2(60,26), XX2_MASK, PPCVSX2, PPCNONE, {XT6, XB6}}, + {"xsadddp", XX3(60,32), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, + {"xsmaddadp", XX3(60,33), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, + {"xscmpudp", XX3(60,35), XX3BF_MASK, PPCVSX, PPCNONE, {BF, XA6, XB6}}, +@@ -5929,14 +6084,18 @@ + {"xvmsubmdp", XX3(60,121), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, + {"xsrdpim", XX2(60,121), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, + {"xvtdivdp", XX3(60,125), XX3BF_MASK, PPCVSX, PPCNONE, {BF, XA6, XB6}}, ++{"xsnmaddasp", XX3(60,129), XX3_MASK, PPCVSX2, PPCNONE, {XT6, XA6, XB6}}, + {"xxland", XX3(60,130), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, + {"xvcvspuxws", XX2(60,136), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, ++{"xsnmaddmsp", XX3(60,137), XX3_MASK, PPCVSX2, PPCNONE, {XT6, XA6, XB6}}, + {"xvrspi", XX2(60,137), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, + {"xxlandc", XX3(60,138), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, + {"xvrsqrtesp", XX2(60,138), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, + {"xvsqrtsp", XX2(60,139), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, ++{"xsnmsubasp", XX3(60,145), XX3_MASK, PPCVSX2, PPCNONE, {XT6, XA6, XB6}}, + {"xxlor", XX3(60,146), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, + {"xvcvspsxws", XX2(60,152), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, ++{"xsnmsubmsp", XX3(60,153), XX3_MASK, PPCVSX2, PPCNONE, {XT6, XA6, XB6}}, + {"xvrspiz", XX2(60,153), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, + {"xxlxor", XX3(60,154), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, + {"xvresp", XX2(60,154), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, +@@ -5949,12 +6108,15 @@ + {"xsnmaddmdp", XX3(60,169), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, + {"xvrspip", XX2(60,169), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, + {"xvtsqrtsp", XX2(60,170), XX2BF_MASK, PPCVSX, PPCNONE, {BF, XB6}}, ++{"xxlorc", XX3(60,170), XX3_MASK, PPCVSX2, PPCNONE, {XT6, XA6, XB6}}, + {"xvrspic", XX2(60,171), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, + {"xscpsgndp", XX3(60,176), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, + {"xsnmsubadp", XX3(60,177), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, ++{"xxlnand", XX3(60,178), XX3_MASK, PPCVSX2, PPCNONE, {XT6, XA6, XB6}}, + {"xvcvsxwsp", XX2(60,184), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, + {"xsnmsubmdp", XX3(60,185), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, + {"xvrspim", XX2(60,185), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, ++{"xxleqv", XX3(60,186), XX3_MASK, PPCVSX2, PPCNONE, {XT6, XA6, XB6}}, + {"xvmaxsp", XX3(60,192), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, + {"xvnmaddasp", XX3(60,193), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, + {"xvminsp", XX3(60,200), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, +@@ -5985,8 +6147,13 @@ + {"xvnmsubmdp", XX3(60,249), XX3_MASK, PPCVSX, PPCNONE, {XT6, XA6, XB6}}, + {"xvrdpim", XX2(60,249), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, + {"xscvdpsp", XX2(60,265), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, ++{"xscvdpspn", XX2(60,267), XX2_MASK, PPCVSX2, PPCNONE, {XT6, XB6}}, ++{"xsrsp", XX2(60,281), XX2_MASK, PPCVSX2, PPCNONE, {XT6, XB6}}, ++{"xscvuxdsp", XX2(60,296), XX2_MASK, PPCVSX2, PPCNONE, {XT6, XB6}}, ++{"xscvsxdsp", XX2(60,312), XX2_MASK, PPCVSX2, PPCNONE, {XT6, XB6}}, + {"xscvdpuxds", XX2(60,328), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, + {"xscvspdp", XX2(60,329), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, ++{"xscvspdpn", XX2(60,331), XX2_MASK, PPCVSX2, PPCNONE, {XT6, XB6}}, + {"xscvdpsxds", XX2(60,344), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, + {"xsabsdp", XX2(60,345), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, + {"xscvuxddp", XX2(60,360), XX2_MASK, PPCVSX, PPCNONE, {XT6, XB6}}, +@@ -6222,6 +6389,8 @@ + {"denbcdq", XRC(63,834,0), X_MASK, POWER6, PPCNONE, {S, FRTp, FRBp}}, + {"denbcdq.", XRC(63,834,1), X_MASK, POWER6, PPCNONE, {S, FRTp, FRBp}}, + ++{"fmrgow", X(63,838), X_MASK, PPCVSX2, PPCNONE, {FRT, FRA, FRB}}, ++ + {"fcfid", XRC(63,846,0), XRA_MASK, PPC64, PPCNONE, {FRT, FRB}}, + {"fcfid", XRC(63,846,0), XRA_MASK, PPC476, PPCNONE, {FRT, FRB}}, + {"fcfid.", XRC(63,846,1), XRA_MASK, PPC64, PPCNONE, {FRT, FRB}}, +@@ -6236,6 +6405,8 @@ + {"fctiduz", XRC(63,943,0), XRA_MASK, POWER7|PPCA2, PPCNONE, {FRT, FRB}}, + {"fctiduz.", XRC(63,943,1), XRA_MASK, POWER7|PPCA2, PPCNONE, {FRT, FRB}}, + ++{"fmrgew", X(63,966), X_MASK, PPCVSX2, PPCNONE, {FRT, FRA, FRB}}, ++ + {"fcfidu", XRC(63,974,0), XRA_MASK, POWER7|PPCA2, PPCNONE, {FRT, FRB}}, + {"fcfidu.", XRC(63,974,1), XRA_MASK, POWER7|PPCA2, PPCNONE, {FRT, FRB}}, + }; diff --git a/gdb-power8-2of2.patch b/gdb-power8-2of2.patch new file mode 100644 index 0000000..af16f9f --- /dev/null +++ b/gdb-power8-2of2.patch @@ -0,0 +1,60 @@ +[PATCH] Enable hw watchpoint with longer ranges using DAWR on Power +http://sourceware.org/ml/gdb-patches/2013-07/msg00085.html +http://sourceware.org/ml/gdb-cvs/2013-07/msg00097.html + +### src/gdb/ChangeLog 2013/07/22 11:42:30 1.15812 +### src/gdb/ChangeLog 2013/07/22 13:17:51 1.15813 +## -1,3 +1,9 @@ ++2013-07-22 Edjunior Barbosa Machado <emachado(a)linux.vnet.ibm.com> ++ ++ * ppc-linux-nat.c (PPC_DEBUG_FEATURE_DATA_BP_DAWR): New define. ++ (ppc_linux_region_ok_for_hw_watchpoint): Add checking to use the new ++ DAWR interface for longer ranges hardware watchpoint (up to 512 bytes). ++ + 2013-07-22 Phil Muldoon <pmuldoon(a)redhat.com> + + * top.c (print_gdb_version): Add help, apropos description and +--- gdb-7.6/gdb/ppc-linux-nat.c.orig 2013-07-24 17:39:30.434549279 +0200 ++++ gdb-7.6/gdb/ppc-linux-nat.c 2013-07-24 17:41:31.337706502 +0200 +@@ -178,7 +178,11 @@ struct ppc_hw_breakpoint + (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT)) + #endif /* PPC_PTRACE_GETHWDBGINFO */ + +- ++/* Feature defined on Linux kernel v3.9: DAWR interface, that enables wider ++ watchpoint (up to 512 bytes). */ ++#ifndef PPC_DEBUG_FEATURE_DATA_BP_DAWR ++#define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10 ++#endif /* PPC_DEBUG_FEATURE_DATA_BP_DAWR */ + + /* Similarly for the general-purpose (gp0 -- gp31) + and floating-point registers (fp0 -- fp31). */ +@@ -1503,6 +1507,7 @@ ppc_linux_region_ok_for_hw_watchpoint (C + to determine the hardcoded watchable region for watchpoints. */ + if (have_ptrace_booke_interface ()) + { ++ int region_size; + /* Embedded DAC-based processors, like the PowerPC 440 have ranged + watchpoints and can watch any access within an arbitrary memory + region. This is useful to watch arrays and structs, for instance. It +@@ -1511,11 +1516,17 @@ ppc_linux_region_ok_for_hw_watchpoint (C + && booke_debug_info.features & PPC_DEBUG_FEATURE_DATA_BP_RANGE + && ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE) + return 2; ++ /* Check if the processor provides DAWR interface. */ ++ if (booke_debug_info.features & PPC_DEBUG_FEATURE_DATA_BP_DAWR) ++ /* DAWR interface allows to watch up to 512 byte wide ranges which ++ can't cross a 512 byte boundary. */ ++ region_size = 512; ++ else ++ region_size = booke_debug_info.data_bp_alignment; + /* Server processors provide one hardware watchpoint and addr+len should + fall in the watchable region provided by the ptrace interface. */ +- if (booke_debug_info.data_bp_alignment +- && (addr + len > (addr & ~(booke_debug_info.data_bp_alignment - 1)) +- + booke_debug_info.data_bp_alignment)) ++ if (region_size ++ && (addr + len > (addr & ~(region_size - 1)) + region_size)) + return 0; + } + /* addr+len must fall in the 8 byte watchable region for DABR-based diff --git a/gdb.spec b/gdb.spec index 73a188d..ab4e2fe 100644 --- a/gdb.spec +++ b/gdb.spec @@ -11,8 +11,9 @@ %global dist .el5 %global el5 1 %endif -# RHEL-5 Brew does not set %{el5}. +# RHEL-5 Brew does not set %{el5}, BZ 1002198 tps-srpmtest does not set %{rhel}. %if "%{?dist}" == ".el5" +%global rhel 5 %global el5 1 %endif @@ -36,7 +37,7 @@ Version: 7.6.1 # The release always contains a leading reserved number, start it at 1. # `upstream' is not a part of `name' to stay fully rpm dependencies compatible for the testing. -Release: 39%{?dist} +Release: 40%{?dist} License: GPLv3+ and GPLv3+ with exceptions and GPLv2+ and GPLv2+ with exceptions and GPL+ and LGPLv2+ and BSD and Public Domain Group: Development/Debuggers @@ -578,6 +579,11 @@ Patch834: gdb-vdso-gcore.patch #=drop Patch835: gdb-psymtab-expand.patch +# [ppc] Support Power8 CPU (IBM, BZ 731875). +#=drop +Patch840: gdb-power8-1of2.patch +Patch841: gdb-power8-2of2.patch + # Fix crash on 'enable count' (Simon Marchi, BZ 993118). Patch843: gdb-enable-count-crash.patch @@ -904,6 +910,8 @@ find -name "*.info*"|xargs rm -f %patch832 -p1 %patch834 -p1 %patch835 -p1 +%patch840 -p1 +%patch841 -p1 %patch843 -p1 %patch836 -p1 @@ -1433,6 +1441,11 @@ fi %endif # 0%{!?el5:1} || "%{_target_cpu}" == "noarch" %changelog +* Sat Aug 31 2013 Jan Kratochvil <jan.kratochvil(a)redhat.com> - 7.6.1-40.fc19 +- Remove --disablerepo='*' from BZ 554152 as it conflicts with BZ 981154. +- [ppc] Support Power8 CPU (IBM, BZ 731875). +- [rhel5] tps-srpmtest does not set %%{rhel} (BZ 1002198, Miroslav Franc). + * Fri Aug 30 2013 Jan Kratochvil <jan.kratochvil(a)redhat.com> - 7.6.1-39.fc19 - Load /etc/gdbinit.d/*.{gdb,py} files automatically (BZ 981520).

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[mimedefang/f19] (3 commits) ...Upgrade to 2.74 (#971523, thanks to Philip Prindeville)
by Robert Scheck 31 Aug '13

31 Aug '13

Summary of changes: dfc576d... Perl 5.18 rebuild (*) 0e9c50b... - Rebuilt for https://fedoraproject.org/wiki/Fedora_20_Mass (*) ad4805a... Upgrade to 2.74 (#971523, thanks to Philip Prindeville) (*) (*) This commit already existed in another branch; no separate mail sent

1 0

[mimedefang/f20] Upgrade to 2.74 (#971523, thanks to Philip Prindeville)
by Robert Scheck 31 Aug '13

31 Aug '13

Summary of changes: ad4805a... Upgrade to 2.74 (#971523, thanks to Philip Prindeville) (*) (*) This commit already existed in another branch; no separate mail sent

1 0

[mimedefang] Upgrade to 2.74 (#971523, thanks to Philip Prindeville)
by Robert Scheck 31 Aug '13

31 Aug '13

commit ad4805a1f36a644459866f9e2994eb25dba5c602 Author: Robert Scheck <robert(a)fedoraproject.org> Date: Sat Aug 31 20:13:14 2013 +0200 Upgrade to 2.74 (#971523, thanks to Philip Prindeville) .gitignore | 1 + mimedefang-2.74-perl_prototype.patch | 15 +++++++++++++++ mimedefang.spec | 25 +++++++++++++++---------- sources | 2 +- 4 files changed, 32 insertions(+), 11 deletions(-) --- diff --git a/.gitignore b/.gitignore index 672f60b..cc0e04b 100644 --- a/.gitignore +++ b/.gitignore @@ -1 +1,2 @@ mimedefang-2.73.tar.gz +/mimedefang-2.74.tar.gz diff --git a/mimedefang-2.74-perl_prototype.patch b/mimedefang-2.74-perl_prototype.patch new file mode 100644 index 0000000..2be819b --- /dev/null +++ b/mimedefang-2.74-perl_prototype.patch @@ -0,0 +1,15 @@ +Patch by Philip Prindeville <philipp_subx(a)redfish-solutions.com> for MIMEDefang <= 2.74, +which avoids "Slave 0 stderr: main::rebuild_entity() called too early to check prototype +at /usr/bin/mimedefang.pl line 805." messages with recent Perl versions. For details see +also http://lists.roaringpenguin.com/pipermail/mimedefang/2013-June/037083.html + +--- mimedefang-2.74/mimedefang.pl.in 2013-05-25 17:30:50.000000000 +0200 ++++ mimedefang-2.74/mimedefang.pl.in.perl_prototype 2013-08-31 19:52:27.000000000 +0200 +@@ -764,6 +764,7 @@ + # Descends through input entity and rebuilds an output entity. The + # various parts of the input entity may be modified (or even deleted) + #*********************************************************************** ++sub rebuild_entity ($$); # Forward declaration to stop warning + sub rebuild_entity ($$) { + my($out, $in) = @_; + my @parts = $in->parts; diff --git a/mimedefang.spec b/mimedefang.spec index 0930aa6..2dde6a0 100644 --- a/mimedefang.spec +++ b/mimedefang.spec @@ -1,12 +1,13 @@ Summary: E-Mail filtering framework using Sendmail's Milter interface Name: mimedefang -Version: 2.73 -Release: 6%{?dist} +Version: 2.74 +Release: 1%{?dist} License: GPLv2+ Group: System Environment/Daemons URL: http://www.mimedefang.org/ Source0: http://www.mimedefang.org/static/%{name}-%{version}.tar.gz Source1: README.FEDORA +Patch0: mimedefang-2.74-perl_prototype.patch Requires: perl-MailTools >= 1.15, perl(Mail::SpamAssassin) >= 1.6 Requires: perl(IO::Stringy) >= 1.212, perl(MIME::Base64) >= 3.03 Requires(pre): shadow-utils @@ -31,6 +32,7 @@ could cause problems, for example, with encrypted or signed messages. %prep %setup -q +%patch0 -p1 -b .perl_prototype cp -pf %{SOURCE1} . %build @@ -47,6 +49,11 @@ sed -e 's/2345/-/' -i $RPM_BUILD_ROOT%{_sysconfdir}/rc.d/init.d/%{name} mkdir -p $RPM_BUILD_ROOT%{_localstatedir}/log/%{name} rm -f $RPM_BUILD_ROOT%{_sysconfdir}/mail/sa-mimedefang.cf.example +# Avoid smfi_setsymlist usage due to memory leaks in Sendmail < 8.14.4 +%if 0%{?rhel}%{?fedora} > 5 +sed -e 's/$-m $MX_SOCKET$/\1 -y/' -i $RPM_BUILD_ROOT%{_sysconfdir}/rc.d/init.d/%{name} +%endif + # Create a dummy file and install perl script for later executing touch $RPM_BUILD_ROOT%{_sysconfdir}/mail/mimedefang-ip-key sed -e '1s@^@#!%{_bindir}/perl\n@' gen-ip-validator.pl > gen-ip-validator.pl.new @@ -59,13 +66,8 @@ touch -c -r Changelog Changelog.utf8 mv -f Changelog.utf8 Changelog %pre -if [ -x %{_sbindir}/fedora-groupadd -a -x %{_sbindir}/fedora-useradd ]; then - getent group defang > /dev/null || %{_sbindir}/fedora-groupadd 8 -r defang - getent passwd defang > /dev/null || %{_sbindir}/fedora-useradd 8 -r -g defang -d %{_localstatedir}/spool/MIMEDefang -s /sbin/nologin -c "MIMEDefang User" defang -else - getent group defang > /dev/null || %{_sbindir}/groupadd -r defang - getent passwd defang > /dev/null || %{_sbindir}/useradd -r -g defang -d %{_localstatedir}/spool/MIMEDefang -s /sbin/nologin -c "MIMEDefang User" defang -fi +getent group defang > /dev/null || %{_sbindir}/groupadd -r defang +getent passwd defang > /dev/null || %{_sbindir}/useradd -r -g defang -d %{_localstatedir}/spool/MIMEDefang -s /sbin/nologin -c "MIMEDefang User" defang exit 0 %post @@ -89,7 +91,7 @@ fi rm -rf $RPM_BUILD_ROOT %files -%defattr(-,root,root) +%defattr(-,root,root,-) %doc README README.{NONROOT,SECURITY,SOPHIE,SPAMASSASSIN,VEXIRA,FEDORA} %doc COPYING Changelog contrib/{word-to-html,linuxorg,fang.pl} examples/*filter* %dir %attr(0750,defang,defang) %{_localstatedir}/log/%{name} @@ -105,6 +107,9 @@ rm -rf $RPM_BUILD_ROOT %config(noreplace) %{_sysconfdir}/logrotate.d/%{name} %changelog +* Sat Aug 31 2013 Robert Scheck <robert(a)fedoraproject.org> 2.74-1 +- Upgrade to 2.74 (#971523, thanks to Philip Prindeville) + * Sat Aug 03 2013 Fedora Release Engineering <rel-eng(a)lists.fedoraproject.org> - 2.73-6 - Rebuilt for https://fedoraproject.org/wiki/Fedora_20_Mass_Rebuild diff --git a/sources b/sources index 6e5d47a..d11eaef 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -385680c16fb7ecb345d7806a5ee31843 mimedefang-2.73.tar.gz +4f394f9ec7b62bea3268cb44a35dedbf mimedefang-2.74.tar.gz

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[openxcap/f20] Clean up spec-file
by Peter Lemenkov 31 Aug '13

31 Aug '13

Summary of changes: b5aaec4... Clean up spec-file (*) (*) This commit already existed in another branch; no separate mail sent

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[rtpproxy] Typo
by Peter Lemenkov 31 Aug '13

31 Aug '13

commit e33e7042db282108843a7e28d69768b921fbc329 Author: Peter Lemenkov <lemenkov(a)gmail.com> Date: Sat Aug 31 22:05:32 2013 +0400 Typo Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> rtpproxy.spec | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) --- diff --git a/rtpproxy.spec b/rtpproxy.spec index 3d0b468..5f9e34f 100644 --- a/rtpproxy.spec +++ b/rtpproxy.spec @@ -100,7 +100,7 @@ getent passwd %{name} >/dev/null || \ %post %if 0%{?el5}%{?el6} if [ $1 -eq 1 ]; then - /sbin/chkconfig --add s%{name} || : + /sbin/chkconfig --add %{name} || : fi %else %systemd_post %{name}.service

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[openxcap] Clean up spec-file
by Peter Lemenkov 31 Aug '13

31 Aug '13

commit b5aaec49570cfbeb6f5ce3a8b3efb1ba9a643452 Author: Peter Lemenkov <lemenkov(a)gmail.com> Date: Sat Aug 31 22:01:44 2013 +0400 Clean up spec-file Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> openxcap.spec | 71 +++++++++++++++++++++++++++++++++------------------------ 1 files changed, 41 insertions(+), 30 deletions(-) --- diff --git a/openxcap.spec b/openxcap.spec index 435ce3f..8eb796b 100644 --- a/openxcap.spec +++ b/openxcap.spec @@ -3,11 +3,14 @@ Name: openxcap Version: 2.0.1 -Release: 3%{?dist} +Release: 4%{?dist} Summary: Fully featured XCAP server Group: System Environment/Daemons License: GPLv2 URL: http://openxcap.org/ +%if 0%{?el7}%{?fedora} +VCS: scm:darcs:http://devel.ag-projects.com/repositories/openxcap +%endif Source0: http://download.ag-projects.com/XCAP/%{name}-%{version}.tar.gz Source1: %{name}.init Source2: %{name}.service @@ -19,6 +22,9 @@ Patch0: openxcap-pillow.patch BuildArch: noarch BuildRoot: %(mktemp -ud %{_tmppath}/%{name}-%{version}-%{release}-XXXXXX) BuildRequires: python-setuptools +%if 0%{?el7}%{?fedora} +BuildRequires: systemd +%endif Requires: python >= 2.5 Requires: MySQL-python >= 1.2.2 Requires: python-application >= 1.2.8 @@ -31,17 +37,17 @@ Requires: python-twisted-web >= 8.1.0 Requires: python-twisted-web2 >= 8.1.0 Requires: python-zope-interface -%if 0%{?fedora} > 17 -# Users and groups -Requires(pre): shadow-utils -Requires(post): systemd-units -Requires(preun): systemd-units -Requires(postun): systemd-units -%else +%if 0%{?el5}%{?el6} Requires(post): chkconfig Requires(preun): chkconfig # This is for /sbin/service Requires(preun): initscripts +%else +# Users and groups +Requires(pre): shadow-utils +Requires(post): systemd +Requires(preun): systemd +Requires(postun): systemd %endif @@ -63,6 +69,7 @@ SIMPLE server solution. %setup -q %patch0 -p1 + %build %{__python} -c 'import setuptools; execfile("setup.py")' build @@ -76,12 +83,13 @@ install -D -p -m 0644 scripts/mysql-create-tables.sql %{buildroot}%{_datadir}/%{ install -D -p -m 0644 scripts/mysql-create-user.sql %{buildroot}%{_datadir}/%{name}/mysql-create-user.sql install -d %{buildroot}%{_localstatedir}/run/%{name} install -d %{buildroot}%{_localstatedir}/log/%{name} -%if 0%{?fedora} > 17 +%if 0%{?el5}%{?el6} +# install init-script +install -D -p -m 0755 %{SOURCE1} %{buildroot}%{_initrddir}/%{name} +%else # install systemd files install -D -m 0644 -p %{SOURCE2} %{buildroot}%{_unitdir}/%{name}.service -install -D -m 0644 -p %{SOURCE3} %{buildroot}/usr/lib/tmpfiles.d/%{name}.conf -%else -install -D -p -m 0755 %{SOURCE1} %{buildroot}%{_initrddir}/%{name} +install -D -m 0644 -p %{SOURCE3} %{buildroot}%{_tmpfilesdir}/%{name}.conf %endif @@ -90,38 +98,35 @@ rm -rf %{buildroot} %pre -%if 0%{?fedora} > 17 +%if 0%{?el7}%{?fedora} getent group %{name} >/dev/null || groupadd -r %{name} getent passwd %{name} >/dev/null || \ useradd -r -g %{name} -d %{_localstatedir}/run/%{name} -s /sbin/nologin \ -c "OpenXCAP Server" %{name} 2>/dev/null || : %endif + %post -%if 0%{?fedora} > 17 -if [ $1 -eq 1 ] ; then - # Initial installation - /bin/systemctl daemon-reload >/dev/null 2>&1 || : +%if 0%{?el5}%{?el6} +if [ $1 -eq 1 ]; then + /sbin/chkconfig --add %{name} || : fi %else -/sbin/chkconfig --add %{name} +%systemd_post %{name}.service %endif %preun -%if 0%{?fedora} > 17 -if [ $1 -eq 0 ] ; then - # Package removal, not upgrade - /bin/systemctl --no-reload disable %{name}.service > /dev/null 2>&1 || : - /bin/systemctl stop %{name}.service > /dev/null 2>&1 || : +%if 0%{?el5}%{?el6} +if [ $1 -eq 0 ]; then + /sbin/service %{name} stop >/dev/null 2>&1 || : + /sbin/chkconfig --del %{name} || : fi %else -if [ $1 = 0 ]; then - /sbin/service %{name} stop > /dev/null 2>&1 - /sbin/chkconfig --del %{name} -fi +%systemd_preun %{name}.service %endif + %if 0%{?fedora} > 17 %triggerun -- %{name} < 2.0.1-1 # Save the current service runlevel info @@ -137,6 +142,7 @@ chown -R %{name}:%{name} %{_sysconfdir}/%{name} chown -R %{name}:%{name} %{_localstatedir}/run/%{name} %endif + %files %doc LICENSE PKG-INFO README TODO opensips/opensips.cfg %dir %{_datadir}/%{name} @@ -146,14 +152,14 @@ chown -R %{name}:%{name} %{_localstatedir}/run/%{name} %{python_sitelib}/xcap %{python_sitelib}/%{name}-%{version}-*.egg-info -%if 0%{?fedora} > 17 +%if 0%{?el7}%{?fedora} %dir %attr(0755, %{name}, %{name}) %{_localstatedir}/log/%{name} -%dir %attr(0755, %{name}, %{name}) %{_localstatedir}/run/%{name} +%ghost %dir %attr(0755, %{name}, %{name}) %{_localstatedir}/run/%{name} %dir %attr(0755, %{name}, %{name}) %{_sysconfdir}/%{name} %dir %attr(0644, %{name}, %{name}) %{_sysconfdir}/%{name}/tls %config(noreplace) %attr(0644, %{name}, %{name}) %{_sysconfdir}/%{name}/config.ini %{_unitdir}/%{name}.service -/usr/lib/tmpfiles.d/%{name}.conf +%{_tmpfilesdir}/%{name}.conf %else %dir %{_sysconfdir}/%{name} %dir %{_sysconfdir}/%{name}/tls @@ -164,6 +170,11 @@ chown -R %{name}:%{name} %{_localstatedir}/run/%{name} %changelog +* Sat Aug 31 2013 Peter Lemenkov <lemenkov(a)gmail.com> - 2.0.1-4 +- Fixed FTBFS (rhbz #992412) +- Marked directory /var/run/openxcap as ghost (rhbz #656651) +- Switched to systemd-macros (rhbz #850259) + * Sat Aug 03 2013 Fedora Release Engineering <rel-eng(a)lists.fedoraproject.org> - 2.0.1-3 - Rebuilt for https://fedoraproject.org/wiki/Fedora_20_Mass_Rebuild

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File mimedefang-2.74.tar.gz uploaded to lookaside cache by robert
by Robert Scheck 31 Aug '13

31 Aug '13

A file has been added to the lookaside cache for mimedefang: 4f394f9ec7b62bea3268cb44a35dedbf mimedefang-2.74.tar.gz

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[freerdp/f18] don't make freerdp.png executable
by Mads Kiilerich 31 Aug '13

31 Aug '13

commit bda2192481bc014696a0dc38f41a5c04cd4d972b Author: Mads Kiilerich <mads(a)kiilerich.com> Date: Sat Aug 31 19:52:17 2013 +0200 don't make freerdp.png executable freerdp.spec | 7 +++++-- 1 files changed, 5 insertions(+), 2 deletions(-) --- diff --git a/freerdp.spec b/freerdp.spec index d3140da..8a12465 100644 --- a/freerdp.spec +++ b/freerdp.spec @@ -1,6 +1,6 @@ Name: freerdp Version: 1.0.1 -Release: 7%{?dist} +Release: 8%{?dist} Summary: Remote Desktop Protocol client Group: Applications/Communications @@ -123,7 +123,7 @@ make install DESTDIR=$RPM_BUILD_ROOT INSTALL='install -p' rm -rf $RPM_BUILD_ROOT/usr/share/freerdp desktop-file-install --dir=$RPM_BUILD_ROOT%{_datadir}/applications xfreerdp.desktop -install -p -D resources/FreeRDP_Icon_256px.png $RPM_BUILD_ROOT%{_datadir}/icons/hicolor/256x256/apps/%{name}.png +install -p -m 644 -D resources/FreeRDP_Icon_256px.png $RPM_BUILD_ROOT%{_datadir}/icons/hicolor/256x256/apps/%{name}.png %clean @@ -166,6 +166,9 @@ gtk-update-icon-cache %{_datadir}/icons/hicolor &>/dev/null || : %changelog +* Sat Aug 31 2013 Mads Kiilerich <mads(a)kiilerich.com> - 1.0.1-8 +- don't make freerdp.png executable + * Sun Sep 30 2012 Mads Kiilerich <mads(a)kiilerich.com> - 1.0.1-7 - merge f17 1.0.1-6 - Backport fix for bug 816692

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