Hi,
Thank you the response! My replies inline below...
On Mon, April 15, 2024 11:14 am, Peter Robinson wrote:
Hi Derek,
I have a Wandboard (yeah, I know, OLD Hardware) currently running a
As in the imx6 based Wandboard? Which model/rev? What release of Fedora, what kernel etc?
Yes, an imx6 Wandboard. I'll have to go upstairs and open the case to see the EXACT model/rev printed on the PCB. Running "cat /proc/cpuinfo" only shows a single core. And it's running Fedora 36, currently running 5.18.9-200.fc36.armv7hl and libgpiod-1.6.3-7.fc36.armv7hl
project, and I'm trying to add some GPIO inputs to it. In previous GPIO handling (on a different platform) I used the /sys/class/gpio interfaces to set up the GPIO, but I've discovered this is now deprecated and removed from Fedora. So I installed libgpiod and am trying to use it.
Yes, we stopped supporting that because it was deprecated and upstream asked us to.
I'm using https://download.technexion.com/development_resources/wandboard/wbquad-revb1... as a reference for the board layout. Specifically, on page 27, it shows me that the JP4 header connects to GPIO3_12, GPIO3_27, GPIO6_31, CPIO1_24, GPIO7_8, GPIO3_26, GPIO_18, and GPIO_19.
I figure that GPIO_18 is going to be gpiochip0 line 18, and GPIO3_12 will be gpiochip3 line 12.. Except that gpiodetect only tells me I have gpiochip0 through gpiochip6, so I'm not sure where GPIO7_8 would get mapped. That's the first issue I have.
You'd likely need to look at the device tree and pinmappings to see how they're mapped out.
I was trying to follow the device tree, and found a dts in the wandboard-org tree that seemed to match the settings from that PDF I pointed to. Of course, that may or may not be correct to the actual hardware I have running upstairs.
The second issue is that the kernel does not have any named mappings, so running gpioinfo just displays generic data, like:
gpiochip6 - 32 lines: line 0: unnamed unused input active-high line 1: unnamed unused input active-high
Except, of course, looking at gpiochip3 line 12 shows me:
gpiochip3 - 32 lines: ... line 12: unnamed "scl" output active-high [used open-drain]
Which seems to imply that that GPIO3_12 is actually used for something else -- or my mapping strategy is off.
Probably a kernel device, often GPIOs are used for other things.
Being only ancillarily associated with Arm/Embedded HW -- what does it mean for a GPIO to be "used for other things"? And more importantly, why would it be wired to a header if it's being used for something else?
A quick look at the dtsi for the wandboards some of the GPIOs re used for SCL/SDA pins on two of the i2c buses. The i2c1 seems to not have anything attached so I guess in on a pin header for end user use, and i2c12 has a audio codec and for the camera connector.
How exactly is this done? Is the pin wired to two places on the PCB?
I'd appreciate any guidance anyone might have on this subject.
If it's a iMX6 based Wandboard the guidance will be limted as the support for ARMv7 went EOL when F-36 did so I have no recollection of what kernel, libgpiod version etc was shipped there.
Understood. I just happen to have bought into the Wandboard platform a long time ago, so this is what I've been using for the project. It uses a USB Relay, leveraging CRelay, so theoretically I could swap the system out for a different board in order to get 4 GPIOs for external switch detction, but honestly I'd rather not spend the money... :)
Peter
-derek