The package rpms/llvm5.0.git has added or updated architecture specific content in its
spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s):
https://src.fedoraproject.org/cgit/rpms/llvm5.0.git/commit/?id=93de27f5aa....
Change:
+%ifarch s390 %{arm} %{ix86}
Thanks.
Full change:
============
commit 91956d615749a5a7be8d93c888296a9cfe594f46
Author: Tom Stellard <tstellar(a)redhat.com>
Date: Tue Mar 20 03:19:59 2018 +0000
Backport r327651 from trunk rhbz#1554349
diff --git a/0001-PPC-Avoid-non-simple-MVT-in-STBRX-optimization.patch
b/0001-PPC-Avoid-non-simple-MVT-in-STBRX-optimization.patch
new file mode 100644
index 0000000..7240966
--- /dev/null
+++ b/0001-PPC-Avoid-non-simple-MVT-in-STBRX-optimization.patch
@@ -0,0 +1,69 @@
+From 3ab40462f17659a4ae14b1f8aa7036e65377a199 Mon Sep 17 00:00:00 2001
+From: Guozhi Wei <carrot(a)google.com>
+Date: Thu, 15 Mar 2018 17:49:12 +0000
+Subject: [PATCH] [PPC] Avoid non-simple MVT in STBRX optimization
+
+PR35402 triggered this case. It bswap and stores a 48bit value, current STBRX
optimization transforms it into STBRX. Unfortunately 48bit is not a simple MVT, there is
no PPC instruction to support it, and it can't be automatically expanded by llvm, so
caused a crash.
+
+This patch detects the non-simple MVT and returns early.
+
+Differential Revision:
https://reviews.llvm.org/D44500
+
+git-svn-id:
https://llvm.org/svn/llvm-project/llvm/trunk@327651
91177308-0d34-0410-b5e6-96231b3b80d8
+---
+ lib/Target/PowerPC/PPCISelLowering.cpp | 6 +++++-
+ test/CodeGen/PowerPC/pr35402.ll | 18 ++++++++++++++++++
+ 2 files changed, 23 insertions(+), 1 deletion(-)
+ create mode 100644 test/CodeGen/PowerPC/pr35402.ll
+
+diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp
b/lib/Target/PowerPC/PPCISelLowering.cpp
+index b3a3c73..7fc3627 100644
+--- a/lib/Target/PowerPC/PPCISelLowering.cpp
++++ b/lib/Target/PowerPC/PPCISelLowering.cpp
+@@ -11861,6 +11861,11 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
+ N->getOperand(1).getValueType() == MVT::i16 ||
+ (Subtarget.hasLDBRX() && Subtarget.isPPC64() &&
+ N->getOperand(1).getValueType() == MVT::i64))) {
++ // STBRX can only handle simple types.
++ EVT mVT = cast<StoreSDNode>(N)->getMemoryVT();
++ if (mVT.isExtended())
++ break;
++
+ SDValue BSwapOp = N->getOperand(1).getOperand(0);
+ // Do an any-extend to 32-bits if this is a half-word input.
+ if (BSwapOp.getValueType() == MVT::i16)
+@@ -11868,7 +11873,6 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
+
+ // If the type of BSWAP operand is wider than stored memory width
+ // it need to be shifted to the right side before STBRX.
+- EVT mVT = cast<StoreSDNode>(N)->getMemoryVT();
+ if (Op1VT.bitsGT(mVT)) {
+ int Shift = Op1VT.getSizeInBits() - mVT.getSizeInBits();
+ BSwapOp = DAG.getNode(ISD::SRL, dl, Op1VT, BSwapOp,
+diff --git a/test/CodeGen/PowerPC/pr35402.ll b/test/CodeGen/PowerPC/pr35402.ll
+new file mode 100644
+index 0000000..06e6d96
+--- /dev/null
++++ b/test/CodeGen/PowerPC/pr35402.ll
+@@ -0,0 +1,18 @@
++; RUN: llc -O2 < %s | FileCheck %s
++target triple = "powerpc64le-linux-gnu"
++
++define void @test(i8* %p, i64 %data) {
++entry:
++ %0 = tail call i64 @llvm.bswap.i64(i64 %data)
++ %ptr = bitcast i8* %p to i48*
++ %val = trunc i64 %0 to i48
++ store i48 %val, i48* %ptr, align 1
++ ret void
++
++; CHECK: sth
++; CHECK: stw
++; CHECK-NOT: stdbrx
++
++}
++
++declare i64 @llvm.bswap.i64(i64)
+--
+1.8.3.1
+
diff --git a/llvm5.0.spec b/llvm5.0.spec
index f01306d..f9a254f 100644
--- a/llvm5.0.spec
+++ b/llvm5.0.spec
@@ -21,7 +21,7 @@
Name: llvm%{ver_major_minor}
Version: %ver_major_minor.1
-Release: 6%{?dist}
+Release: 7%{?dist}
Summary: The Low Level Virtual Machine
License: NCSA
@@ -39,6 +39,7 @@ Patch6: 0001-PowerPC-Don-t-use-xscvdpspn-on-the-P7.patch
Patch7: 0001-Fix-return-type-in-ORC-readMem-client-interface.patch
Patch8: 0001-Ignore-all-duplicate-frame-index-expression.patch
Patch9: 0002-Reinstantiate-old-bad-deduplication-logic-that-was-r.patch
+Patch10: 0001-PPC-Avoid-non-simple-MVT-in-STBRX-optimization.patch
BuildRequires: cmake
@@ -263,6 +264,9 @@ test "`%{buildroot}/%{install_bindir}/llvm-config
--cmakedir`" -ef "%{buildroot}
%doc %{_pkgdocdir}/html
%changelog
+* Mon Mar 19 2018 Tom Stellard <tstellar(a)redhat.com> - 5.0.1-7
+- Backport r327651 from trunk rhbz#1554349
+
* Wed Mar 07 2018 Adam Williamson <awilliam(a)redhat.com> - 5.0.1-6
- Rebuild to fix GCC 8 mis-compilation
See
https://da.gd/YJVwk ("GCC 8 ABI change on x86_64")
commit 93de27f5aa761044fb1c285730cd178501dc94ac
Author: Adam Williamson <awilliam(a)redhat.com>
Date: Fri Mar 9 17:08:28 2018 -0800
Try harder to save memory, add ix86 to 'save memory' list
As per the other llvm packages, use ld flags that prioritize
memory use over performance for memory-impaired arches. Also add
ix86 to the list of memory-impaired arches, as my Rawhide build
attempt died on i686 due to lack of memory:
https://koji.fedoraproject.org/koji/taskinfo?taskID=25551155
diff --git a/llvm5.0.spec b/llvm5.0.spec
index b361141..f01306d 100644
--- a/llvm5.0.spec
+++ b/llvm5.0.spec
@@ -118,7 +118,9 @@ for f in `grep -Rl 'XFAIL.\+arm' test/ExecutionEngine `; do
rm $f; done
mkdir -p _build
cd _build
-%ifarch s390 %{arm}
+%ifarch s390 %{arm} %{ix86}
+# use linker flags that prioritize efficiency over speed (try and save memory)
+%global optflags %{optflags} -Wl,--no-keep-memory -Wl,--reduce-memory-overheads
# Decrease debuginfo verbosity to reduce memory consumption during final library linking
%global optflags %(echo %{optflags} | sed 's/-g /-g1 /')
%endif