The package rpms/elpa.git has added or updated architecture specific content in its
spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s):
https://src.fedoraproject.org/cgit/rpms/elpa.git/commit/?id=4e8d6a84a4c6b....
Change:
+%ifarch x86_64
Thanks.
Full change:
============
commit 81630640284512c537f94dea65f687e7a143c850
Merge: febcfce 4e8d6a8
Author: Dominik 'Rathann' Mierzejewski <dominik(a)greysector.net>
Date: Fri Sep 25 13:06:44 2020 +0200
Merge branch 'f33'
commit 4e8d6a84a4c6b62775dc30d2a7358f77a6a39f71
Author: Dominik 'Rathann' Mierzejewski <dominik(a)greysector.net>
Date: Fri Sep 25 13:04:45 2020 +0200
update to 2020.05.001 (ABI and API break)
rebase patches and drop obsolete ones
legacy API removed
build only SSE3 and AVX SIMD kernels for x86 which should still work on 10yo machines
disable VSX SIMD as the kernels are broken in this release
diff --git a/.gitignore b/.gitignore
index 3932767..13ce3a2 100644
--- a/.gitignore
+++ b/.gitignore
@@ -6,3 +6,5 @@
/elpa-2017.05.003.tar.gz.asc
/elpa-2019.05.002.tar.gz
/elpa-2019.05.002.tar.gz.asc
+/elpa-2020.05.001.tar.gz
+/elpa-2020.05.001.tar.gz.asc
diff --git a/elpa-aarch64-no-fma.patch b/elpa-aarch64-no-fma.patch
deleted file mode 100644
index 8993c06..0000000
--- a/elpa-aarch64-no-fma.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -up
elpa-2019.05.002/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.aarch64-no-fma
elpa-2019.05.002/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c
----
elpa-2019.05.002/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.aarch64-no-fma 2019-10-08
12:17:31.000000000 +0200
-+++
elpa-2019.05.002/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c 2019-12-11
23:23:10.153036398 +0100
-@@ -193,7 +193,6 @@
- #endif /* VEC_SET == 1281 */
-
- #if VEC_SET == NEON_ARCH64_128
--#define __ELPA_USE_FMA__
- #ifdef DOUBLE_PRECISION_REAL
- #define offset 2
- #define __SIMD_DATATYPE __Float64x2_t
diff --git a/elpa-c-binding.patch b/elpa-c-binding.patch
new file mode 100644
index 0000000..c6c0171
--- /dev/null
+++ b/elpa-c-binding.patch
@@ -0,0 +1,12 @@
+diff -up mpich/test/shared/test_blacs_infrastructure.F90.layout
mpich/test/shared/test_blacs_infrastructure.F90
+--- mpich/test/shared/test_blacs_infrastructure.F90.layout 2020-06-08 16:09:32.000000000
+0200
++++ mpich/test/shared/test_blacs_infrastructure.F90 2020-09-24 16:32:01.225307325 +0200
+@@ -84,7 +84,7 @@ module test_blacs_infrastructure
+ #ifdef SXAURORA
+ character(len=1), intent(in) :: layout
+ #else
+- character(len=1), intent(in), value :: layout
++ character(kind=c_char), intent(in), value :: layout
+ #endif
+ TEST_INT_TYPE, intent(out) :: my_blacs_ctxt, my_prow, my_pcol
+
diff --git a/elpa-flexiblas.patch b/elpa-flexiblas.patch
new file mode 100644
index 0000000..8f6e678
--- /dev/null
+++ b/elpa-flexiblas.patch
@@ -0,0 +1,12 @@
+diff -up mpich/configure.ac.fb mpich/configure.ac
+--- mpich/configure.ac.fb 2020-09-15 13:19:43.467050663 +0200
++++ mpich/configure.ac 2020-09-15 13:19:43.468050671 +0200
+@@ -527,7 +527,7 @@ if test x"${have_mkl}" = x"yes" ; then
+ else
+
+ dnl first check blas
+- AC_SEARCH_LIBS([dgemm],[openblas satlas blas],[have_blas=yes],[have_blas=no])
++ AC_SEARCH_LIBS([dgemm],[flexiblas openblas satlas
blas],[have_blas=yes],[have_blas=no])
+ AC_MSG_CHECKING([whether we can link a program with a blas lib])
+ AC_MSG_RESULT([${have_blas}])
+
diff --git a/elpa-merge.patch b/elpa-merge.patch
deleted file mode 100644
index b303e95..0000000
--- a/elpa-merge.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-diff --git a/src/elpa1/elpa1_merge_systems_real_template.F90
b/src/elpa1/elpa1_merge_systems_real_template.F90
-index 6bc91a81..9ce49e4e 100644
---- a/src/elpa1/elpa1_merge_systems_real_template.F90
-+++ b/src/elpa1/elpa1_merge_systems_real_template.F90
-@@ -438,9 +438,9 @@
- #ifdef WITH_OPENMP
-
- call obj%timer%start("OpenMP parallel" // PRECISION_SUFFIX)
--!$OMP PARALLEL PRIVATE(i,my_thread,delta,s,info,j)
-- my_thread = omp_get_thread_num()
--!$OMP DO
-+!!$OMP PARALLEL PRIVATE(i,my_thread,delta,s,info,j)
-+ my_thread = 0
-+!!$OMP DO
- #endif
- DO i = my_proc+1, na1, n_procs ! work distributed over all processors
- call obj%timer%start("blas")
-@@ -484,7 +484,7 @@
- endif
- enddo
- #ifdef WITH_OPENMP
--!$OMP END PARALLEL
-+!!$OMP END PARALLEL
-
- call obj%timer%stop("OpenMP parallel" // PRECISION_SUFFIX)
-
-@@ -513,9 +513,9 @@
-
- call obj%timer%start("OpenMP parallel" // PRECISION_SUFFIX)
-
--!$OMP PARALLEL DO PRIVATE(i) SHARED(na1, my_proc, n_procs, &
--!$OMP d1,dbase, ddiff, z, ev_scale, obj) &
--!$OMP DEFAULT(NONE)
-+!!$OMP PARALLEL DO PRIVATE(i) SHARED(na1, my_proc, n_procs, &
-+!!$OMP d1,dbase, ddiff, z, ev_scale, obj) &
-+!!$OMP DEFAULT(NONE)
-
- #endif
- DO i = my_proc+1, na1, n_procs ! work distributed over all processors
-@@ -532,7 +532,7 @@
- ! ev_scale(i) = ev_scale_val
- enddo
- #ifdef WITH_OPENMP
--!$OMP END PARALLEL DO
-+!!$OMP END PARALLEL DO
-
- call obj%timer%stop("OpenMP parallel" // PRECISION_SUFFIX)
-
diff --git a/elpa-onenode.patch b/elpa-onenode.patch
index 83c74b5..ee409cf 100644
--- a/elpa-onenode.patch
+++ b/elpa-onenode.patch
@@ -1,7 +1,7 @@
diff -up mpich/configure.ac.onenode mpich/configure.ac
---- mpich/configure.ac.onenode 2018-06-22 09:00:16.000000000 +0200
-+++ mpich/configure.ac 2018-07-30 14:59:05.236011016 +0200
-@@ -1211,19 +1211,11 @@ mkdir -p modules private_modules test_mo
+--- mpich/configure.ac.onenode 2020-09-15 12:55:04.903053847 +0200
++++ mpich/configure.ac 2020-09-15 13:18:02.433294919 +0200
+@@ -1696,19 +1696,11 @@ mkdir -p modules private_modules test_mo
# into "postdeps_FC" and causes linking errors later on.
postdeps_FC=$(echo $postdeps_FC | sed 's/-l //g')
@@ -19,17 +19,17 @@ diff -up mpich/configure.ac.onenode mpich/configure.ac
- fi
-fi
- AC_SUBST([SUFFIX])
- AC_SUBST([PKG_CONFIG_FILE],[elpa${SUFFIX}-${PACKAGE_VERSION}.pc])
+ dnl store-build-config
+ AC_ARG_ENABLE([store-build-config],
diff -up mpich/INSTALL.md.onenode mpich/INSTALL.md
---- mpich/INSTALL.md.onenode 2018-07-30 14:59:05.236011016 +0200
-+++ mpich/INSTALL.md 2018-07-30 15:00:21.978765980 +0200
-@@ -139,9 +139,6 @@ configure FC=gfortran --with-mpi=no
+--- mpich/INSTALL.md.onenode 2020-09-15 12:55:04.903053847 +0200
++++ mpich/INSTALL.md 2020-09-15 12:55:35.322278705 +0200
+@@ -171,9 +171,6 @@ configure FC=gfortran --with-mpi=no
**DO NOT specify a MPI compiler here!**
-Note, that the installed *ELPA* library files will be suffixed with
--"_onenode", in order to discriminate this build from possible ones with MPI.
+-`_onenode`, in order to discriminate this build from possible ones with MPI.
-
Please continue reading at "C) Enabling GPU support"
diff --git a/elpa-simd.patch b/elpa-simd.patch
deleted file mode 100644
index 7df0035..0000000
--- a/elpa-simd.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-diff -up mpich/configure.ac.simd mpich/configure.ac
---- mpich/configure.ac.simd 2019-12-06 12:33:56.084477063 +0100
-+++ mpich/configure.ac 2019-12-06 12:36:48.024825037 +0100
-@@ -947,6 +947,8 @@ int main(int argc, char **argv) {
- fi
-
-
-+save_CFLAGS="$CFLAGS"
-+CFLAGS="$CFLAGS -msse3"
- if test x"${need_sse}" = x"yes"; then
- AC_MSG_CHECKING(whether we can compile SSE3 with gcc intrinsics in C)
- AC_COMPILE_IFELSE([AC_LANG_SOURCE([
-@@ -965,7 +967,9 @@ int main(int argc, char **argv) {
- AC_MSG_ERROR([Could not compile test program, try with --disable-sse, or adjust the
C compiler or CFLAGS])
- fi
- AC_DEFINE([HAVE_SSE_INTRINSICS],[1],[gcc intrinsics SSE is supported on this CPU])
-+ SSE3CFLAGS="-msse3"
- fi
-+CFLAGS="$save_CFLAGS"
-
-
- if test x"${need_sse_assembly}" = x"yes"; then
-@@ -1007,6 +1011,8 @@ fi
- if test x"${need_avx}" = x"yes"; then
- dnl check whether one can compile AVX gcc intrinsics
- AC_MSG_CHECKING([whether we can compile AVX gcc intrinsics in C])
-+ save_CFLAGS="$CFLAGS"
-+ CFLAGS="$CFLAGS -mavx"
- AC_COMPILE_IFELSE([AC_LANG_SOURCE([
- #include <x86intrin.h>
- int main(int argc, char **argv){
-@@ -1023,11 +1029,15 @@ if test x"${need_avx}" = x"yes"; then
- AC_MSG_ERROR([Could not compile a test program with AVX, try with --disable-avx, or
adjust the C compiler or CFLAGS])
- fi
- AC_DEFINE([HAVE_AVX],[1],[AVX is supported on this CPU])
-+ AVXCFLAGS="-mavx"
-+ CFLAGS="$save_CFLAGS"
- fi
-
-
- if test x"${need_avx2}" = x"yes"; then
- AC_MSG_CHECKING([whether we can compile AVX2 gcc intrinsics in C])
-+ save_CFLAGS="$CFLAGS"
-+ CFLAGS="$CFLAGS -mavx2 -mfma"
- AC_COMPILE_IFELSE([AC_LANG_SOURCE([
- #include <x86intrin.h>
- int main(int argc, char **argv){
-@@ -1045,6 +1055,8 @@ if test x"${need_avx2}" = x"yes"; then
- AC_MSG_ERROR([Could not compile a test program with AVX2, try with --disable-avx2,
or adjust the C compiler or CFLAGS])
- fi
- AC_DEFINE([HAVE_AVX2],[1],[AVX2 is supported on this CPU])
-+ AVX2CFLAGS="-mavx2 -mfma"
-+ CFLAGS="$save_CFLAGS"
- fi
-
-
-@@ -1335,6 +1347,9 @@ AC_SUBST([WITH_MKL])
- AC_SUBST([WITH_BLACS])
- AC_SUBST([FC_MODINC])
- AC_SUBST([FC_MODOUT])
-+AC_SUBST([SSE3CFLAGS])
-+AC_SUBST([AVXCFLAGS])
-+AC_SUBST([AVX2CFLAGS])
- AC_SUBST([OPENMP_CFLAGS])
- AC_SUBST([OPENMP_FCFLAGS])
- AC_SUBST([OPENMP_LDFLAGS])
-diff -up mpich/Makefile.am.simd mpich/Makefile.am
---- mpich/Makefile.am.simd 2019-10-08 12:17:31.000000000 +0200
-+++ mpich/Makefile.am 2019-12-06 12:33:56.087477086 +0100
-@@ -33,6 +33,7 @@ endif
- # internal parts
- noinst_LTLIBRARIES += libelpa@SUFFIX(a)_private.la
- libelpa@SUFFIX@_private_la_FCFLAGS = $(AM_FCFLAGS) $(FC_MODOUT)private_modules
$(FC_MODINC)private_modules
-+libelpa@SUFFIX@_private_la_CFLAGS = $(SSE3CFLAGS) $(AVXCFLAGS) $(AVX2CFLAGS)
$(AM_CFLAGS)
- libelpa@SUFFIX@_private_la_SOURCES = \
- src/elpa_impl.F90 \
- src/elpa_autotune_impl.F90 \
diff --git a/elpa-vsx.patch b/elpa-vsx.patch
index ab4d580..7f3de10 100644
--- a/elpa-vsx.patch
+++ b/elpa-vsx.patch
@@ -1,7 +1,7 @@
diff -up mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.vsx
mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c
---- mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.vsx 2019-10-08
10:17:31.000000000 +0000
-+++ mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c 2019-12-06
12:42:40.826334062 +0000
-@@ -175,7 +175,7 @@
+--- mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.vsx 2020-05-27
13:16:25.000000000 +0200
++++ mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c 2020-09-21
15:23:52.106489501 +0200
+@@ -184,7 +184,7 @@
#ifdef DOUBLE_PRECISION_REAL
#define offset 2
#define __SIMD_DATATYPE __vector double
@@ -10,57 +10,164 @@ diff -up
mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.vsx
#endif
#ifdef SINGLE_PRECISION_REAL
-@@ -1829,7 +1829,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo
- #endif /* VEC_SET == 128 */
+@@ -197,6 +197,7 @@
+ #define _SIMD_STORE vec_st
+ #define _SIMD_ADD vec_add
+ #define _SIMD_MUL vec_mul
++#define _SIMD_SUB vec_sub
+ #define _SIMD_SET1 vec_splats
- #if VEC_SET == 1282
-- __SIMD_DATATYPE sign = vec_spalts(-1.0);
-+ __SIMD_DATATYPE sign = vec_splats(-1.0);
+ #endif /* VEC_SET == SPARC64_SSE */
+@@ -1629,7 +1630,7 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_
+
+
+ #undef ROW_LENGTH
+-#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128
++#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET ==
NEON_ARCH64_128
+ #ifdef DOUBLE_PRECISION_REAL
+ #define ROW_LENGTH 6
+ #define STEP_SIZE 6
+@@ -1640,7 +1641,7 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_
+ #define STEP_SIZE 12
+ #define UPPER_BOUND 8
#endif
+-#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128
*/
++#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET
== NEON_ARCH64_128 */
+ #if VEC_SET == AVX_256 || VEC_SET == AVX2_256
+ #ifdef DOUBLE_PRECISION_REAL
+@@ -1680,14 +1681,14 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_
-@@ -5124,7 +5124,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo
- #endif /* VEC_SET == 128 */
- #if VEC_SET == 1282
-- __SIMD_DATATYPE sign = vec_spalts(-1.0);
-+ __SIMD_DATATYPE sign = vec_splats(-1.0);
+ #undef ROW_LENGTH
+-#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128
++#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET ==
NEON_ARCH64_128
+ #ifdef DOUBLE_PRECISION_REAL
+ #define ROW_LENGTH 4
#endif
+ #ifdef SINGLE_PRECISION_REAL
+ #define ROW_LENGTH 8
+ #endif
+-#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128
*/
++#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET
== NEON_ARCH64_128 */
- #if VEC_SET == 256
-@@ -8141,7 +8141,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo
- #endif /* VEC_SET == 128 */
+ #if VEC_SET == AVX_256 || VEC_SET == AVX2_256
+ #ifdef DOUBLE_PRECISION_REAL
+@@ -1715,14 +1716,14 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_
+ }
- #if VEC_SET == 1282
-- __SIMD_DATATYPE sign = vec_spalts(-1.0);
-+ __SIMD_DATATYPE sign = vec_splats(-1.0);
+ #undef ROW_LENGTH
+-#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128
++#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET ==
NEON_ARCH64_128
+ #ifdef DOUBLE_PRECISION_REAL
+ #define ROW_LENGTH 2
+ #endif
+ #ifdef SINGLE_PRECISION_REAL
+ #define ROW_LENGTH 4
#endif
+-#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128
*/
++#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET
== NEON_ARCH64_128 */
- #if VEC_SET == 256
-@@ -10865,7 +10865,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo
- #endif /* VEC_SET == 128 */
+ #if VEC_SET == AVX_256 || VEC_SET == AVX2_256
+ #ifdef DOUBLE_PRECISION_REAL
+@@ -1772,7 +1773,7 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_
+ #ifdef BLOCK6
- #if VEC_SET == 1282
-- __SIMD_DATATYPE sign = vec_spalts(-1.0);
-+ __SIMD_DATATYPE sign = vec_splats(-1.0);
+ #undef ROW_LENGTH
+-#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128
++#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET ==
NEON_ARCH64_128
+ #ifdef DOUBLE_PRECISION_REAL
+ #define ROW_LENGTH 4
+ #define STEP_SIZE 4
+@@ -1783,7 +1784,7 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_
+ #define STEP_SIZE 8
+ #define UPPER_BOUND 4
#endif
+-#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128
*/
++#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET
== NEON_ARCH64_128 */
- #if VEC_SET == 256
-@@ -13324,7 +13324,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo
- #endif /* VEC_SET == 128 */
+ #if VEC_SET == AVX_256 || VEC_SET == AVX2_256
+ #ifdef DOUBLE_PRECISION_REAL
+@@ -1822,14 +1823,14 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_
+ }
- #if VEC_SET == 1282
-- __SIMD_DATATYPE sign = vec_spalts(-1.0);
-+ __SIMD_DATATYPE sign = vec_splats(-1.0);
+ #undef ROW_LENGTH
+-#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128
++#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET ==
NEON_ARCH64_128
+ #ifdef DOUBLE_PRECISION_REAL
+ #define ROW_LENGTH 2
#endif
+ #ifdef SINGLE_PRECISION_REAL
+ #define ROW_LENGTH 4
+ #endif
+-#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128
*/
++#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET
== NEON_ARCH64_128 */
- #if VEC_SET == 256
-@@ -15497,7 +15497,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo
- #endif /* VEC_SET == 128 */
+ #if VEC_SET == AVX_256 || VEC_SET == AVX2_256
+ #ifdef DOUBLE_PRECISION_REAL
+diff -up mpich/src/elpa2/kernels/real_vsx_4hv_double_precision.c.vsx
mpich/src/elpa2/kernels/real_vsx_4hv_double_precision.c
+--- mpich/src/elpa2/kernels/real_vsx_4hv_double_precision.c.vsx 2020-05-27
13:16:25.000000000 +0200
++++ mpich/src/elpa2/kernels/real_vsx_4hv_double_precision.c 2020-09-21 15:15:22.777337971
+0200
+@@ -49,11 +49,11 @@
+ #define REALCASE 1
+ #define DOUBLE_PRECISION 1
+ #define BLOCK4 1
+-#define SIMD_SET VSX_SSE
++#define VEC_SET VSX_SSE
+ #include "../../general/precision_macros.h"
+-#include "real_vsx_4hv_template.c"
++#include "real_128bit_256bit_512bit_BLOCK_template.c"
+ #undef BLOCK4
+-#undef SIMD_SET
++#undef VEC_SET
+ #undef REALCASE
+ #undef DOUBLE_PRECISION
- #if VEC_SET == 1282
-- __SIMD_DATATYPE sign = vec_spalts(-1.0);
-+ __SIMD_DATATYPE sign = vec_splats(-1.0);
- #endif
+diff -up mpich/src/elpa2/kernels/real_vsx_4hv_single_precision.c.vsx
mpich/src/elpa2/kernels/real_vsx_4hv_single_precision.c
+--- mpich/src/elpa2/kernels/real_vsx_4hv_single_precision.c.vsx 2020-05-27
13:16:25.000000000 +0200
++++ mpich/src/elpa2/kernels/real_vsx_4hv_single_precision.c 2020-09-21 15:15:22.777337971
+0200
+@@ -49,11 +49,11 @@
+ #define REALCASE 1
+ #define SINGLE_PRECISION 1
+ #define BLOCK4 1
+-#define SIMD_SET VSX_SSE
++#define VEC_SET VSX_SSE
+ #include "../../general/precision_macros.h"
+-#include "real_vsx_4hv_template.c"
++#include "real_128bit_256bit_512bit_BLOCK_template.c"
+ #undef BLOCK4
+-#undef SIMD_SET
++#undef VEC_SET
+ #undef REALCASE
+ #undef SINGLE_PRECISION
+
+diff -up mpich/src/elpa2/kernels/real_vsx_6hv_double_precision.c.vsx
mpich/src/elpa2/kernels/real_vsx_6hv_double_precision.c
+--- mpich/src/elpa2/kernels/real_vsx_6hv_double_precision.c.vsx 2020-05-27
13:16:25.000000000 +0200
++++ mpich/src/elpa2/kernels/real_vsx_6hv_double_precision.c 2020-09-21 15:15:22.777337971
+0200
+@@ -49,11 +49,11 @@
+ #define REALCASE 1
+ #define DOUBLE_PRECISION 1
+ #define BLOCK6 1
+-#define SIMD_SET VSX_SSE
++#define VEC_SET VSX_SSE
+ #include "../../general/precision_macros.h"
+-#include "real_vsx_6hv_template.c"
++#include "real_128bit_256bit_512bit_BLOCK_template.c"
+ #undef BLOCK6
+-#undef SIMD_SET
++#undef VEC_SET
+ #undef REALCASE
+ #undef DOUBLE_PRECISION
- #if VEC_SET == 256
+diff -up mpich/src/elpa2/kernels/real_vsx_6hv_single_precision.c.vsx
mpich/src/elpa2/kernels/real_vsx_6hv_single_precision.c
+--- mpich/src/elpa2/kernels/real_vsx_6hv_single_precision.c.vsx 2020-05-27
13:16:25.000000000 +0200
++++ mpich/src/elpa2/kernels/real_vsx_6hv_single_precision.c 2020-09-21 15:15:22.777337971
+0200
+@@ -51,7 +51,7 @@
+ #define BLOCK6 1
+ #define VEC_SET VSX_SSE
+ #include "../../general/precision_macros.h"
+-#include "real_vsx_6hv_template.c"
++#include "real_128bit_256bit_512bit_BLOCK_template.c"
+ #undef VEC_SET
+ #undef BLOCK6
+ #undef REALCASE
diff --git a/elpa.spec b/elpa.spec
index 5924029..8345bbb 100644
--- a/elpa.spec
+++ b/elpa.spec
@@ -10,12 +10,12 @@
%bcond_without check
-%global sover 14
+%global sover 15
Summary: High-performance library for parallel solution of eigenvalue problems
Name: elpa
-Version: 2019.05.002
-Release: 6%{?dist}
+Version: 2020.05.001
+Release: 1%{?dist}
URL:
https://elpa.mpcdf.mpg.de/software
Source0:
https://elpa.mpcdf.mpg.de/html/Releases/%{version}/elpa-%{version}.tar.gz
Source1:
https://elpa.mpcdf.mpg.de/html/Releases/%{version}/elpa-%{version}.tar.gz...
@@ -24,18 +24,17 @@ Source2: gpg-keyring-26BC8F899C6A2698BDD6EF6A69260748A5F870B5.gpg
Patch1: elpa-onenode.patch
# fix typos in VSX code
Patch2: elpa-vsx.patch
-# fix detection of AVX(2) compiler support and use them only in the library
-Patch3: elpa-simd.patch
-# fix test errors on aarch64
-Patch4: elpa-aarch64-no-fma.patch
-# fix test errors on x86_64
-Patch5: elpa-merge.patch
+# fix test failures on x86_64
+Patch3: elpa-c-binding.patch
+# add FlexiBLAS support
+Patch6: elpa-flexiblas.patch
License: LGPLv3+
BuildRequires: %{blaslib}-devel
BuildRequires: gcc-gfortran
BuildRequires: gnupg2
BuildRequires: libtool
BuildRequires: /usr/bin/execstack
+BuildRequires: /usr/bin/xxd
%if %{with papi}
BuildRequires: papi-devel
%endif
@@ -156,9 +155,8 @@ mv elpa-%{version} mpich
pushd mpich
%patch1 -p1 -b .onenode
%patch2 -p1 -b .vsx
-%patch3 -p1 -b .simd
-%patch4 -p1 -b .aarch64-no-fma
-%patch5 -p1 -b .merge
+%patch3 -p1 -b .cb
+%patch6 -p1 -b .fb
autoreconf -vifs
popd
cp -pr mpich openmpi
@@ -167,7 +165,7 @@ mkdir _openmp
cp -pr mpich openmpi serial _openmp/
%build
-%global defopts --disable-silent-rules --disable-static --docdir=%{_pkgdocdir}
--enable-legacy-interface
+%global defopts --disable-silent-rules --disable-static --docdir=%{_pkgdocdir}
%global ldflags %{__global_ldflags}
%if %{with atlas}
%global ldflags %{ldflags} -L%{_libdir}/atlas
@@ -178,11 +176,15 @@ cp -pr mpich openmpi serial _openmp/
for mpi in '' mpich openmpi ; do
export CFLAGS="%{optflags}"
+%ifarch x86_64
+ export CFLAGS="${CFLAGS} -mssse3 -mavx"
+%endif
export LDFLAGS="%{ldflags}"
export FCFLAGS="%{fcflags}"
if [ -n "$mpi" ]; then
module load mpi/${mpi}-%{_arch}
export LDFLAGS="${LDFLAGS} -L$MPI_LIB"
+ export CFLAGS="${CFLAGS} -I$MPI_INCLUDE"
export FCFLAGS="${FCFLAGS} -I$MPI_FORTRAN_MOD_DIR"
fi
for s in '' _openmp ; do
@@ -195,20 +197,20 @@ for mpi in '' mpich openmpi ; do
mpiflag="--with-mpi=no"
fi
sed -i -e
"s,\${includedir}/elpa@SUFFIX@-@PACKAGE_VERSION@/modules,${fmoddir},"
elpa.pc.in
- sed -i "s,openblas,flexiblas openblas," configure
%configure %{defopts} \
%ifarch aarch64
--enable-neon-arch64 \
%endif
%ifarch ppc64le
- --enable-vsx \
+ --disable-vsx \
%endif
%ifnarch x86_64
--disable-sse-assembly \
--disable-sse \
--disable-avx \
- --disable-avx2 \
%endif
+ --disable-avx2 \
+ --disable-avx512 \
${s:+--enable-openmp} \
%if %{with papi}
--with-papi \
@@ -253,19 +255,10 @@ for s in '' _openmp ; do
done
done
echo ".so elpa2_print_kernels.1" >
%{buildroot}%{_mandir}/man1/elpa2_print_kernels_openmp.1
+rm %{buildroot}%{_pkgdocdir}/USERS_GUIDE_DEPRECATED_LEGACY_API.md
%if %{with check}
%check
-# Test suite failures
-# Build time: minutes
-# Number of tests: serial - 83, MPI - 127
-# build time serial serial+omp mpich mpich+omp openmpi openmpi+omp
-# aarch64 20 3 9 3 7 3 3
-# armv7hl N/A N/A N/A N/A N/A N/A N/A
-# i686 24 0 8 0 8 0 0
-# ppc64le 13 9 16 10 14 10 10
-# s390x 11 0 5 0 2 0 0
-# x86_64 23 0 18 0 12 0 0
. /etc/profile.d/modules.sh
for s in '' _openmp ; do
for mpi in '' mpich openmpi ; do
@@ -320,9 +313,7 @@ done
%{_pkgdocdir}/CONTRIBUTING.md
%exclude %{_pkgdocdir}/INSTALL.md
%{_pkgdocdir}/USERS_GUIDE.md
-%{_pkgdocdir}/USERS_GUIDE_DEPRECATED_LEGACY_API.md
%{_mandir}/man3/elpa_*.3*
-%{_mandir}/man3/solve_evp_*.3*
%files devel
%{_libdir}/libelpa.so
@@ -358,6 +349,13 @@ done
%{_fmoddir}/openmpi*/*.mod
%changelog
+* Tue Sep 15 2020 Dominik Mierzejewski <rpm(a)greysector.net> 2020.05.001-1
+- update to 2020.05.001 (ABI and API break)
+- rebase patches and drop obsolete ones
+- legacy API removed
+- build only SSE3 and AVX SIMD kernels for x86 which should still work on 10yo machines
+- disable VSX SIMD as the kernels are broken in this release
+
* Wed Aug 12 2020 Iñaki Úcar <iucar(a)fedoraproject.org> - 2019.05.002-6
-
https://fedoraproject.org/wiki/Changes/FlexiBLAS_as_BLAS/LAPACK_manager
diff --git a/sources b/sources
index d37d237..b651319 100644
--- a/sources
+++ b/sources
@@ -1,2 +1,2 @@
-SHA512 (elpa-2019.05.002.tar.gz) =
af665a5b22a994d8a1d1f1c97e53706bcd74a90caa2142ad10cd356a790438ae9a9f45d1f2e4df5d485271b0416dff7f7ed70d681d1c67741b30af40c7f787c1
-SHA512 (elpa-2019.05.002.tar.gz.asc) =
96b59ac8a9ca31d156c77c6ca1df0cb09c0c29ad3f8c5d37f42b7ea73e3aa0301950107afaed66309cc5f3d4f084b5cc5d57ca8e4ad5ed87ed3482b62ff54412
+SHA512 (elpa-2020.05.001.tar.gz) =
0bd6bc15256f30df17066df357a109c9620cd423a4f5063a1fc3a3d44c7dfe091ec5f6dacfaacecbc006de220fb44c1cce3398471a00d41c5e93bc6f4023e207
+SHA512 (elpa-2020.05.001.tar.gz.asc) =
7e37ef2be8bbdbdc31205208cd9a718ec952504b7edde763f0cb2d608aca1e1922c7a8bea08f27e00152193011dbe3d95ec28f2e190f215613f885e5ea3c7341