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mreynolds pushed a commit to branch master
in repository 389-ds-base.
commit e59420eea162b2482abe1111953f2da0f60b8efb
Author: William Brown <firstyear(a)redhat.com>
Date: Tue Mar 28 13:50:48 2017 +1000
Ticket 48989 - Re-implement lock counter
Bug Description: ppc 32bit does not support gcc atomic_*_8 operations.
Fix Description: Move the hardware detection routines outside of the
platform checks. Make these check the libc exposed values for __atomic
and that is used to determine if we use locks or atomics.
https://pagure.io/389-ds-base/issue/48989
Author: wibrown
Review by: mreynolds
Signed-off-by: Mark Reynolds <mreynolds(a)redhat.com>
---
configure.ac | 74 +++++++++++++++++++++-----------------
ldap/servers/slapd/slapi_counter.c | 58 +++++++++++++++++++++++-------
2 files changed, 86 insertions(+), 46 deletions(-)
diff --git a/configure.ac b/configure.ac
index 197b7b8..504a6bb 100644
--- a/configure.ac
+++ b/configure.ac
@@ -556,7 +556,6 @@ case $host in
case $host in
i*86-*-linux*)
AC_DEFINE([CPU_x86], [], [cpu type x86])
- AC_DEFINE([ATOMIC_64BIT_OPERATIONS], [1], [enabling atomic counter])
;;
x86_64-*-linux*)
with_xsixfour="yes"
@@ -566,23 +565,6 @@ case $host in
# wibrown -- 2017-02-21 disabled temporarily
# with_atomic_queue="yes"
# AC_DEFINE([ATOMIC_QUEUE_OPERATIONS], [1], [enabling atomic queue operations])
- AC_DEFINE([ATOMIC_64BIT_OPERATIONS], [1], [enabling atomic counter])
-
- AC_MSG_CHECKING([for SSE4.2 features ...])
- save_CFLAGS="$CFLAGS"
- CFLAGS="$CFLAGS -msse4.2"
- AC_TRY_COMPILE(
- [],
- [return 0;],
- [
- AC_DEFINE([HAVE_SSE4_2], [1], [Have sss4.2 on this platform arch])
- AC_MSG_RESULT([SSE4.2 avaliable on this platform])
- ],
- [
- AC_MSG_RESULT([SSE4.2 not avaliable on this platform])
- ]
- )
- CFLAGS="$save_CFLAGS"
;;
aarch64-*-linux*)
AC_DEFINE([CPU_arm], [], [cpu type arm])
@@ -601,17 +583,6 @@ case $host in
s390x-*-linux*)
;;
esac
- AC_MSG_CHECKING([for GCC provided 64-bit atomic bool cas function ...])
- AC_LINK_IFELSE([AC_LANG_PROGRAM([[]],
- [[long long ptrval = 0, val = 0, newval = 1;
(void)__sync_bool_compare_and_swap_8(&ptrval, val, newval);]])],
- [AC_DEFINE([HAVE_64BIT_ATOMIC_CAS_FUNC], [1], [have 64-bit atomic bool
compare and swap function provided by gcc])AC_MSG_RESULT([yes])],
- [AC_MSG_RESULT([no])])
- AC_MSG_CHECKING([for GCC provided 64-bit atomic ops functions ...])
- AC_LINK_IFELSE([AC_LANG_PROGRAM([[]],
- [[long long ptrval = 0, val = 0;
(void)__sync_add_and_fetch_8(&ptrval, val);]])],
- [AC_DEFINE([HAVE_64BIT_ATOMIC_OP_FUNCS], [1], [have 64-bit atomic
operation functions provided by gcc])AC_MSG_RESULT([yes])],
- [AC_MSG_RESULT([no])])
-
# some programs use the native thread library directly
THREADLIB=-lpthread
AC_SUBST([THREADLIB], [$THREADLIB])
@@ -655,7 +626,6 @@ case $host in
AC_DEFINE([_POSIX_C_SOURCE], [199506L], [POSIX revision])
AC_DEFINE([_HPUX_SOURCE], [1], [Source namespace])
AC_DEFINE([_INCLUDE_STDC__SOURCE_199901], [1], [to pick up all of the printf format
macros in inttypes.h])
- AC_DEFINE([ATOMIC_64BIT_OPERATIONS], [1], [enabling atomic counter])
# assume 64 bit
initconfigdir="/$PACKAGE_NAME/config"
perlexec='/opt/perl_64/bin/perl'
@@ -690,12 +660,11 @@ dnl Cstd and Crun are required to link any C++ related code
initdir='$(sysconfdir)/init.d'
case $host in
i?86-*-solaris2.1[[0-9]]*)
-dnl I dont know why i386 need this explicit
+ dnl I dont know why i386 need this explicit
AC_DEFINE([HAVE_GETPEERUCRED], [1], [have getpeerucred])
;;
sparc-*-solaris*)
-dnl includes some assembler stuff in counter.o
- AC_DEFINE([ATOMIC_64BIT_OPERATIONS], [1], [enabling atomic counter])
+ dnl includes some assembler stuff in counter.o
AC_DEFINE([CPU_sparc], [], [cpu type sparc])
TARGET='SPARC'
;;
@@ -706,6 +675,45 @@ dnl includes some assembler stuff in counter.o
;;
esac
+AC_MSG_CHECKING([for SSE4.2 features ...])
+save_CFLAGS="$CFLAGS"
+CFLAGS="$CFLAGS -msse4.2"
+AC_TRY_COMPILE(
+ [],
+ [return 0;],
+ [
+ AC_DEFINE([HAVE_SSE4_2], [1], [Have sss4.2 on this platform arch])
+ AC_MSG_RESULT([SSE4.2 avaliable on this platform])
+ ],
+ [
+ AC_MSG_RESULT([SSE4.2 not avaliable on this platform])
+ ]
+)
+CFLAGS="$save_CFLAGS"
+
+AC_MSG_CHECKING([for GCC provided 64-bit atomic operations])
+AC_LINK_IFELSE([AC_LANG_PROGRAM([[
+ #include <inttypes.h>
+ ]],
+ [[
+ uint64_t t_counter = 0;
+ uint64_t t_oldval = 0;
+ uint64_t t_newval = 1;
+
+ __atomic_compare_exchange_8(&t_counter, &t_oldval, t_newval, 0,
__ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST);
+ __atomic_add_fetch_8(&t_counter, t_newval, __ATOMIC_SEQ_CST);
+ __atomic_sub_fetch_8(&t_counter, t_newval, __ATOMIC_SEQ_CST);
+ __atomic_load(&t_counter, &t_oldval, __ATOMIC_SEQ_CST);
+ return 0;
+ ]])],
+ [
+ AC_DEFINE([ATOMIC_64BIT_OPERATIONS], [1], [have 64-bit atomic operation functions
provided by gcc])
+ AC_MSG_RESULT([yes])
+ ],
+ [
+ AC_MSG_RESULT([no])
+ ]
+)
# cmd line overrides default setting above
if test -n "$with_initddir" ; then
diff --git a/ldap/servers/slapd/slapi_counter.c b/ldap/servers/slapd/slapi_counter.c
index 4b03a29..9904fe9 100644
--- a/ldap/servers/slapd/slapi_counter.c
+++ b/ldap/servers/slapd/slapi_counter.c
@@ -12,17 +12,22 @@
#include "slap.h"
+#ifndef ATOMIC_64BIT_OPERATIONS
+#include <pthread.h>
+#endif
+
#ifdef HPUX
-#ifdef ATOMIC_64BIT_OPERATIONS
#include <machine/sys/inline.h>
#endif
-#endif
/*
* Counter Structure
*/
typedef struct slapi_counter {
uint64_t value;
+#ifndef ATOMIC_64BIT_OPERATIONS
+ pthread_mutex_t _lock;
+#endif
} slapi_counter;
/*
@@ -53,6 +58,9 @@ void slapi_counter_init(Slapi_Counter *counter)
if (counter != NULL) {
/* Set the value to 0. */
slapi_counter_set_value(counter, 0);
+#ifndef ATOMIC_64BIT_OPERATIONS
+ pthread_mutex_init(&(counter->_lock), NULL);
+#endif
}
}
@@ -65,6 +73,9 @@ void slapi_counter_init(Slapi_Counter *counter)
void slapi_counter_destroy(Slapi_Counter **counter)
{
if ((counter != NULL) && (*counter != NULL)) {
+#ifndef ATOMIC_64BIT_OPERATIONS
+ pthread_mutex_destroy(&((*counter)->_lock));
+#endif
slapi_ch_free((void **)counter);
}
}
@@ -99,17 +110,15 @@ uint64_t slapi_counter_decrement(Slapi_Counter *counter)
uint64_t slapi_counter_add(Slapi_Counter *counter, uint64_t addvalue)
{
uint64_t newvalue = 0;
-#ifdef HPUX
- uint64_t prev = 0;
-#endif
if (counter == NULL) {
return newvalue;
}
-
-#ifndef HPUX
+#ifdef ATOMIC_64BIT_OPERATIONS
newvalue = __atomic_add_fetch_8(&(counter->value), addvalue,
__ATOMIC_SEQ_CST);
#else
+#ifdef HPUX
+ uint64_t prev = 0;
/* fetchadd only works with values of 1, 4, 8, and 16. In addition, it requires
* it's argument to be an integer constant. */
if (addvalue == 1) {
@@ -133,6 +142,12 @@ uint64_t slapi_counter_add(Slapi_Counter *counter, uint64_t
addvalue)
_Asm_mov_to_ar(_AREG_CCV, prev);
} while (prev != _Asm_cmpxchg(_FASZ_D, _SEM_ACQ, &(counter->value),
newvalue, _LDHINT_NONE));
}
+#else
+ pthread_mutex_lock(&(counter->_lock));
+ counter->value += addvalue;
+ newvalue = counter->value;
+ pthread_mutex_unlock(&(counter->_lock));
+#endif
#endif
return newvalue;
@@ -147,17 +162,16 @@ uint64_t slapi_counter_add(Slapi_Counter *counter, uint64_t
addvalue)
uint64_t slapi_counter_subtract(Slapi_Counter *counter, uint64_t subvalue)
{
uint64_t newvalue = 0;
-#ifdef HPUX
- uint64_t prev = 0;
-#endif
if (counter == NULL) {
return newvalue;
}
-#ifndef HPUX
+#ifdef ATOMIC_64BIT_OPERATIONS
newvalue = __atomic_sub_fetch_8(&(counter->value), subvalue,
__ATOMIC_SEQ_CST);
#else
+#ifdef HPUX
+ uint64_t prev = 0;
/* fetchadd only works with values of -1, -4, -8, and -16. In addition, it requires
* it's argument to be an integer constant. */
if (subvalue == 1) {
@@ -181,6 +195,12 @@ uint64_t slapi_counter_subtract(Slapi_Counter *counter, uint64_t
subvalue)
_Asm_mov_to_ar(_AREG_CCV, prev);
} while (prev != _Asm_cmpxchg(_FASZ_D, _SEM_ACQ, &(counter->value),
newvalue, _LDHINT_NONE));
}
+#else
+ pthread_mutex_lock(&(counter->_lock));
+ counter->value -= subvalue;
+ newvalue = counter->value;
+ pthread_mutex_unlock(&(counter->_lock));
+#endif
#endif
return newvalue;
@@ -199,14 +219,20 @@ uint64_t slapi_counter_set_value(Slapi_Counter *counter, uint64_t
newvalue)
return value;
}
-#ifndef HPUX
+#ifdef ATOMIC_64BIT_OPERATIONS
__atomic_store_8(&(counter->value), newvalue, __ATOMIC_SEQ_CST);
#else /* HPUX */
+#ifdef HPUX
do {
value = counter->value;
/* Put value in a register for cmpxchg to compare against */
_Asm_mov_to_ar(_AREG_CCV, value);
} while (value != _Asm_cmpxchg(_FASZ_D, _SEM_ACQ, &(counter->value), newvalue,
_LDHINT_NONE));
+#else
+ pthread_mutex_lock(&(counter->_lock));
+ counter->value = newvalue;
+ pthread_mutex_unlock(&(counter->_lock));
+#endif
#endif
return newvalue;
}
@@ -224,14 +250,20 @@ uint64_t slapi_counter_get_value(Slapi_Counter *counter)
return value;
}
-#ifndef HPUX
+#ifdef ATOMIC_64BIT_OPERATIONS
value = __atomic_load_8(&(counter->value), __ATOMIC_SEQ_CST);
#else /* HPUX */
+#ifdef HPUX
do {
value = counter->value;
/* Put value in a register for cmpxchg to compare against */
_Asm_mov_to_ar(_AREG_CCV, value);
} while (value != _Asm_cmpxchg(_FASZ_D, _SEM_ACQ, &(counter->value), value,
_LDHINT_NONE));
+#else
+ pthread_mutex_lock(&(counter->_lock));
+ value = counter->value;
+ pthread_mutex_unlock(&(counter->_lock));
+#endif
#endif
return value;
--
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